| #include "mt7621.dtsi" |
| |
| #include <dt-bindings/gpio/gpio.h> |
| #include <dt-bindings/input/input.h> |
| |
| / { |
| aliases { |
| label-mac-device = &gmac0; |
| }; |
| |
| keys { |
| compatible = "gpio-keys"; |
| |
| reset { |
| label = "reset"; |
| gpios = <&gpio 12 GPIO_ACTIVE_LOW>; |
| linux,code = <KEY_RESTART>; |
| }; |
| }; |
| }; |
| |
| &gmac0 { |
| mtd-mac-address = <&factory 0x22>; |
| label = "dsa"; |
| }; |
| |
| &switch0 { |
| ports { |
| port@0 { |
| status = "okay"; |
| label = "eth0"; |
| }; |
| |
| port@1 { |
| status = "okay"; |
| label = "eth1"; |
| mtd-mac-address = <&factory 0x22>; |
| mtd-mac-address-increment = <1>; |
| }; |
| |
| port@2 { |
| status = "okay"; |
| label = "eth2"; |
| mtd-mac-address = <&factory 0x22>; |
| mtd-mac-address-increment = <2>; |
| }; |
| |
| port@3 { |
| status = "okay"; |
| label = "eth3"; |
| mtd-mac-address = <&factory 0x22>; |
| mtd-mac-address-increment = <3>; |
| }; |
| |
| port@4 { |
| status = "okay"; |
| label = "eth4"; |
| mtd-mac-address = <&factory 0x22>; |
| mtd-mac-address-increment = <4>; |
| }; |
| }; |
| }; |
| |
| &nand { |
| status = "okay"; |
| |
| partitions { |
| compatible = "fixed-partitions"; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| |
| partition@0 { |
| label = "u-boot"; |
| reg = <0x0 0x80000>; |
| read-only; |
| }; |
| |
| partition@80000 { |
| label = "u-boot-env"; |
| reg = <0x80000 0x60000>; |
| read-only; |
| }; |
| |
| factory: partition@e0000 { |
| label = "factory"; |
| reg = <0xe0000 0x60000>; |
| }; |
| |
| partition@140000 { |
| label = "kernel1"; |
| reg = <0x140000 0x300000>; |
| }; |
| |
| partition@440000 { |
| label = "kernel2"; |
| reg = <0x440000 0x300000>; |
| }; |
| |
| partition@740000 { |
| label = "ubi"; |
| reg = <0x740000 0xf7c0000>; |
| }; |
| }; |
| }; |
| |
| &state_default { |
| gpio { |
| groups = "uart2", "uart3", "pcie", "rgmii2", "jtag"; |
| function = "gpio"; |
| }; |
| }; |
| |
| &spi0 { |
| /* |
| * This board has 2Mb spi flash soldered in and visible |
| * from manufacturer's firmware. |
| * But this SoC shares spi and nand pins, |
| * and current driver doesn't handle this sharing well |
| */ |
| status = "disabled"; |
| |
| flash@1 { |
| compatible = "jedec,spi-nor"; |
| reg = <1>; |
| spi-max-frequency = <10000000>; |
| |
| partitions { |
| compatible = "fixed-partitions"; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| |
| partition@0 { |
| label = "spi"; |
| reg = <0x0 0x200000>; |
| read-only; |
| }; |
| }; |
| }; |
| }; |
| |
| &xhci { |
| status = "disabled"; |
| }; |