ASR_BASE
Change-Id: Icf3719cc0afe3eeb3edc7fa80a2eb5199ca9dda1
diff --git a/marvell/linux/arch/arm/boot/dts/asr1803-p403.dts b/marvell/linux/arch/arm/boot/dts/asr1803-p403.dts
new file mode 100644
index 0000000..ebc339f
--- /dev/null
+++ b/marvell/linux/arch/arm/boot/dts/asr1803-p403.dts
@@ -0,0 +1,796 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2021 ASR Technology Group Ltd.
+ */
+
+/dts-v1/;
+#include "asr1803.dtsi"
+
+/ {
+ model = "ASR 1803(FALCON) Board EVB";
+ compatible = "asr,1803-evb", "asr,1803";
+
+ memory {
+ reg = <0x00000000 0x10000000>;
+ };
+
+ firmware {
+ optee {
+ compatible = "linaro,optee-tz";
+ method = "smc";
+ };
+ };
+
+ soc {
+ axi@d4200000 { /* AXI */
+ usbphy: usbphy@d4207000 {
+ status = "okay";
+ };
+ udc: udc@d4208000 {
+ enable-vbuson-int = <0x1>;
+ /* no-acchg-det; */
+ status = "okay";
+ };
+ ehci: ehci@d4208100 {
+ status = "okay";
+ };
+ otg: otg@d4208100 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&otg_vbus_func>;
+ otg,use-gpio-vbus;
+ gpio-num = <122>;
+ };
+ eth0: asr-eth@0xd4281800 {
+ compatible = "asr,asr-eth";
+ pinctrl-names = "default", "rgmii-pins";
+ pinctrl-0 = <&emac_pmx_func0 &emac_pmx_func2 &emac_pmx_func3>;
+ pinctrl-1 = <&emac_pmx_func0 &emac_pmx_func1 &emac_pmx_func2 &emac_pmx_func3>;
+ reg = <0xd4281800 0x200>;
+ interrupts = <10 11>;
+ lpm-qos = <PM_QOS_CPUIDLE_BLOCK_AXI>;
+ clocks = <&soc_clocks ASR1803_CLK_EMAC>;
+ clock-names = "emac-clk";
+ status = "okay";
+
+ reset-gpio = <&gpio 23 0>;
+ reset-active-low;
+
+ reset-delays-us = <0 100000 100000>;
+
+ clk-tuning-enable;
+ /* clk-config(32bit)
+ *
+ * clk_sel(clk-config[23:16])
+ * RGMII:
+ * tx | clk_sel: 0 - from external RX clock
+ * 1 - from inverted external RX clock
+ * rx | clk_sel: 0 - from external RX clock
+ * 1 - from inverted external RX clock
+ *
+ * RMII:
+ * tx | clk_sel: 0 - RMII clock
+ * 1 - Inverted RMII clock
+ * rx | clk_sel: 0 - RMII clock
+ * 1 - Inverted RMII clock
+ *
+ */
+ tx-clk-config = <0x0>;
+ rx-clk-config = <0x0>;
+ 3v3-enable = <1>; /* IO voltage, 1 - 3.3v, 0 - 1.8v */
+
+ phy-handle = <&phy3>;
+
+ /* enable fix link for ethernet switch */
+ /*
+ fixed-link {
+ speed = <100>;
+ full-duplex;
+ phy-mode = "rmii";
+ };
+ */
+
+ mdio: mdio-bus {
+ #address-cells = <0x1>;
+ #size-cells = <0x0>;
+ /* YT8521 10M/100M/100OM 1.8V RGMII PHY */
+ phy0: phy@0 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ device_type = "ethernet-phy";
+ reg = <0x0>; /* set phy address*/
+ phy-mode = "rgmii";
+ tx_rx_delay = <0xb 0x0>; /* 150ps per step*/
+ };
+
+ /* YT8512B 10M/100M 3.3V RMII PHY */
+ phy3: phy@3 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ device_type = "ethernet-phy";
+ reg = <0x3>; /* set phy address*/
+ phy-mode = "rmii";
+ };
+
+ /* IP175D 10M/100M 3.3V RMII SWITCH */
+ phy1: phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ device_type = "ethernet-phy";
+ reg = <0x1>; /* set phy address*/
+ phy-mode = "rmii";
+ };
+ };
+ };
+ qspi: spi@0xd420b000 {
+ asr,qspi-freq = <78000000>;
+ asr,qspi-tx-buf=<128>;
+ asr,qspi-rx-buf=<128>;
+ /* asr,qspi-ahb-enable=<0>; */
+ status = "okay";
+ };
+ /* SD card */
+ sdh0: sdh@d4280000 {
+ pinctrl-names = "default", "slow", "fast";
+ pinctrl-0 = <&sdh0_pmx_func1 &sdh0_pmx_func2 &sdh0_pmx_func3>;
+ pinctrl-1 = <&sdh0_pmx_func1_slow &sdh0_pmx_func2_slow &sdh0_pmx_func3>;
+ pinctrl-2 = <&sdh0_pmx_func1_fast &sdh0_pmx_func2_fast &sdh0_pmx_func3>;
+ /*
+ * Genernal use, juse set vmmc-supply and vqmmc-supply
+ * vmmc-supply = <&supply1>
+ * vqmmc-supply = <&supply2>
+ *
+ * For compatibility, to select one from two supply source
+ * vmmc-supply = <&supply1 &supply1_backup>;
+ * vqmmc-supply = <&supply2 &supply2_backup>;
+ * vmmc2-supply = <&supply1_backup &supply1>;
+ * vqmmc2-supply = <&supply2_backup &supply2>;
+ */
+ vmmc-supply = <&pm802ldo4 &vcc_sdh1>;
+ vqmmc-supply = <&pm802ldo6 &pm803ldo8>;
+ vmmc2-supply = <&vcc_sdh1 &pm802ldo4>;
+ vqmmc2-supply = <&pm803ldo8 &pm802ldo6>;
+ bus-width = <4>;
+ no-mmc;
+ no-sdio;
+ non-removable;
+ broken-cd;
+ wp-inverted;
+ asr,sdh-pm-runtime-en;
+ asr,sdh-host-caps-disable = <(MMC_CAP_UHS_SDR104)>;
+ asr,sdh-quirks = <(
+ SDHCI_QUIRK_BROKEN_CARD_DETECTION |
+ SDHCI_QUIRK_BROKEN_TIMEOUT_VAL
+ )>;
+ asr,sdh-quirks2 = <(
+ SDHCI_QUIRK2_SET_AIB_MMC |
+ SDHCI_QUIRK2_PRESET_VALUE_BROKEN
+ )>;
+ /* prop "sdh-dtr-data":
+ <timing preset_rate src_rate tx_delay rx_delay tx_dline_reg rx_dline_reg> */
+ asr,sdh-dtr-data =
+ <PXA_MMC_TIMING_LEGACY PXA_SDH_DTR_26M PXA_SDH_DTR_104M 0 0 0 0>,
+ <PXA_MMC_TIMING_SD_HS PXA_SDH_DTR_52M PXA_SDH_DTR_104M 0 0 0 0>,
+ <PXA_MMC_TIMING_UHS_DDR50 PXA_SDH_DTR_52M PXA_SDH_DTR_104M 0 0 0 3>,
+ <PXA_MMC_TIMING_UHS_SDR50 PXA_SDH_DTR_104M PXA_SDH_DTR_208M 0 0 0 0>,
+ <PXA_MMC_TIMING_UHS_SDR104 PXA_SDH_DTR_208M PXA_SDH_DTR_208M 0 0 0 0>,
+ <PXA_MMC_TIMING_MAX PXA_SDH_DTR_PS_NONE PXA_SDH_DTR_104M 0 0 0 0>;
+ status = "okay";
+ };
+
+ /* SDIO */
+ sdh1: sdh@d4280800 {
+ pinctrl-names = "default", "fast", "sleep";
+ pinctrl-0 = <&sdh1_pmx_func1 &sdh1_pmx_func2 &sdh1_pmx_func3>;
+ pinctrl-1 = <&sdh1_pmx_func1_fast &sdh1_pmx_func2_fast &sdh1_pmx_func3>;
+ pinctrl-2 = <&sdh1_pmx_edge_wakeup>;
+ bus-width = <4>;
+ no-mmc;
+ no-sd;
+ non-removable;
+ keep-power-in-suspend;
+ enable-sdio-wakeup;
+ /* clk-scaling-config:
+ <up_threshold down_threshold polling_interval> */
+ clk-scaling-config = <25 12 200>;
+ min-ddr-qos = <156000 312000 400000>;
+ asr,sdh-pm-runtime-en;
+ asr,sdh-quirks = <(
+ SDHCI_QUIRK_BROKEN_CARD_DETECTION |
+ SDHCI_QUIRK_BROKEN_TIMEOUT_VAL
+ )>;
+ asr,sdh-quirks2 = <(
+ SDHCI_QUIRK2_NO_TIMER_RETUNING |
+ SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
+ SDHCI_QUIRK2_BASE_CLOCK_ALWAYS_ON
+ )>;
+ asr,sdh-pm-caps = <(MMC_PM_KEEP_POWER)>;
+ asr,sdh-host-caps2 = <(
+ MMC_CAP2_ONLY_1_8V |
+ MMC_CAP2_DISABLE_PROBE_CDSCAN |
+ MMC_CAP2_CLK_SCALE |
+ MMC_CAP2_BUS_CLK_NO_SCALE
+ )>;
+ /* prop "sdh-dtr-data":
+ <timing preset_rate src_rate tx_delay rx_delay tx_dline_reg rx_dline_reg> */
+ asr,sdh-dtr-data =
+ <PXA_MMC_TIMING_LEGACY PXA_SDH_DTR_26M PXA_SDH_DTR_104M 0 0 0 0>,
+ <PXA_MMC_TIMING_SD_HS PXA_SDH_DTR_45M PXA_SDH_DTR_89M 0 0 0 0>,
+ <PXA_MMC_TIMING_UHS_DDR50 PXA_SDH_DTR_52M PXA_SDH_DTR_104M 0 0 0 3>,
+ <PXA_MMC_TIMING_UHS_SDR50 PXA_SDH_DTR_83M PXA_SDH_DTR_83M 0 0 0 3>,
+ <PXA_MMC_TIMING_UHS_SDR104 PXA_SDH_DTR_208M PXA_SDH_DTR_208M 0 0 0 0>,
+ <PXA_MMC_TIMING_MAX PXA_SDH_DTR_PS_NONE PXA_SDH_DTR_89M 0 0 0 0>;
+ status = "okay";
+ };
+ };
+
+ apb@d4000000 {
+ mfpr: mfpr@d401e000 {
+ status = "okay";
+ };
+ timer0: timer@d4014000 {
+ status = "okay";
+ };
+ uart1: uart@d4017000 { /* nezhas evb use ap uart */
+ pinctrl-names = "default","sleep";
+ pinctrl-0 = <&uart1_pmx_func1 &uart1_pmx_func2>;
+ pinctrl-1 = <&uart1_pmx_func1_sleep &uart1_pmx_func2>;
+ edge-wakeup-gpio = <&gpio 29 0>; /* GPIO29: AP UART rx pin */
+ status = "okay";
+ };
+ uart2: uart@d4036000 {
+ pinctrl-names = "default";
+ status = "okay";
+ };
+ rtc: rtc@d4010000 {
+ status = "okay";
+ };
+ pmx: pinmux@d401e000 {
+ /* pin base = base_addr / 4, nr pins & gpio function */
+ pinctrl-single,gpio-range = <
+ /*
+ * GPIO number is hardcoded for range at here.
+ * In gpio chip, GPIO number is not hardcoded for range.
+ * Since one gpio pin may be routed to multiple pins,
+ * define these gpio range in pxa910-dkb.dts not pxa910.dtsi.
+ */
+ /*&range 80 4 0 */ /* GPIO25 ~ GPIO28 */
+ &range 55 32 0 /* GPIO0 ~ GPIO31 */
+ &range 87 32 0 /* GPIO32 ~ GPIO63 */
+ &range 119 32 0 /* GPIO64 ~ GPIO95 */
+ &range 151 32 0 /* GPIO96 ~ GPIO127 */
+ >;
+
+ ssp0_pmx_func: ssp0_pmx_func {
+ pinctrl-single,pins = <
+ GPIO36 AF1 /* TXD */
+ GPIO35 AF1 /* RXD */
+ GPIO34 AF1 /* FRM */
+ /*GPIO34 AF0*/ /* FRM *//* DXS101 Use the config of Cs-gpios */
+ GPIO33 AF1 /* SCLK */
+ >;
+ DS_MEDIUM;PULL_NONE;EDGE_NONE;SL_NORMAL;
+ };
+ lcd_bl_func: lcd_bl_func {
+ pinctrl-single,pins = <
+ VCXO_OUT AF1 /* GPIO126, lcd bl */
+ GPIO24 AF0 /* reset */
+ GPIO22 AF0 /* lcd d/c */
+ >;
+ MFP_DEFAULT;
+ };
+ uart1_pmx_func1: uart1_pmx_func1 {
+ pinctrl-single,pins = <
+ GPIO29 AF1
+ >;
+ MFP_DEFAULT;
+ };
+ uart1_pmx_func2: uart1_pmx_func2 {
+ pinctrl-single,pins = <
+ GPIO30 AF1
+ >;
+ MFP_DEFAULT;
+ };
+ uart1_pmx_func1_sleep: uart1_pmx_func1_sleep {
+ pinctrl-single,pins = <
+ GPIO29 AF1
+ >;
+ DS_MEDIUM;PULL_NONE;EDGE_BOTH;SL_NORMAL;
+ };
+ twsi0_pmx_func: twsi0_pmx_func {
+ pinctrl-single,pins = <
+ GPIO49 AF1
+ GPIO50 AF1
+ >;
+ MFP_LPM_FLOAT;
+ };
+ twsi0_pmx_gpio: twsi0_pmx_gpio {
+ pinctrl-single,pins = <
+ GPIO49 AF0
+ GPIO50 AF0
+ >;
+ MFP_LPM_FLOAT;
+ };
+ twsi1_pmx_func: twsi1_pmx_func {
+ pinctrl-single,pins = <
+ GPIO10 AF1
+ GPIO11 AF1
+ >;
+ MFP_LPM_FLOAT;
+ };
+ twsi1_pmx_gpio: twsi1_pmx_gpio {
+ pinctrl-single,pins = <
+ GPIO10 AF0
+ GPIO11 AF0
+ >;
+ MFP_LPM_FLOAT;
+ };
+ /* no pull, no LPM */
+ dvc_pmx_func: dvc_pmx_func {
+ /* hw-dvc */
+ pinctrl-single,pins = <
+ TDS_DIO0 AF0
+ TDS_DIO1 AF0
+ >;
+ DS_MEDIUM;PULL_FLOAT;EDGE_NONE;SL_NORMAL;
+ };
+
+ leds_pmx_func: leds_pmx_func {
+ pinctrl-single,pins = <
+ DF_IO10 AF1
+ DF_IO11 AF1
+ DF_IO12 AF1
+ >;
+ DS_MEDIUM;PULL_FLOAT;EDGE_NONE;SL_NORMAL;
+ };
+
+ sd_ldo_en: sd_ldo_en {
+ pinctrl-single,pins = <
+ GPIO12 AF0
+ >;
+ MFP_PULL_DOWN;
+ };
+ sdh0_pmx_func1: sdh0_pmx_func1 {
+ pinctrl-single,pins = <
+ MMC1_DAT3 AF0
+ MMC1_DAT2 AF0
+ MMC1_DAT1 AF0
+ MMC1_DAT0 AF0
+ MMC1_CMD AF0
+ >;
+ DS_MEDIUM;PULL_NONE;EDGE_NONE;SL_NORMAL;
+ };
+ sdh0_pmx_func2: sdh0_pmx_func2 {
+ pinctrl-single,pins = <
+ MMC1_CLK AF0
+ >;
+ DS_MEDIUM;PULL_NONE;EDGE_NONE;
+ };
+ sdh0_pmx_func3: sdh0_pmx_func3 {
+ pinctrl-single,pins = <
+ MMC1_CD AF0
+ >;
+ MFP_PULL_UP;
+ };
+ sdh0_pmx_func1_slow: sdh0_pmx_func1_slow {
+ pinctrl-single,pins = <
+ MMC1_DAT3 AF0
+ MMC1_DAT2 AF0
+ MMC1_DAT1 AF0
+ MMC1_DAT0 AF0
+ MMC1_CMD AF0
+ >;
+ DS_FAST0;PULL_NONE;EDGE_NONE;SL_NORMAL;
+ };
+ sdh0_pmx_func2_slow: sdh0_pmx_func2_slow {
+ pinctrl-single,pins = <
+ MMC1_CLK AF0
+ >;
+ DS_FAST0;PULL_NONE;EDGE_NONE;
+ };
+ sdh0_pmx_func1_fast: sdh0_pmx_func1_fast {
+ pinctrl-single,pins = <
+ MMC1_DAT3 AF0
+ MMC1_DAT2 AF0
+ MMC1_DAT1 AF0
+ MMC1_DAT0 AF0
+ MMC1_CMD AF0
+ >;
+ DS_FAST1;PULL_NONE;EDGE_NONE;SL_NORMAL;
+ };
+ sdh0_pmx_func2_fast: sdh0_pmx_func2_fast {
+ pinctrl-single,pins = <
+ MMC1_CLK AF0
+ >;
+ DS_FAST1;PULL_NONE;EDGE_NONE;
+ };
+ sdh1_pmx_func1_fast: sdh1_pmx_func1_fast {
+ pinctrl-single,pins = <
+ TDS_DIO13 AF0 /* WLAN_DAT3 */
+ TDS_DIO14 AF0 /* WLAN_DAT2 */
+ TDS_DIO15 AF0 /* WLAN_DAT1 */
+ TDS_DIO16 AF0 /* WLAN_DAT0 */
+ TDS_DIO17 AF0 /* WLAN_CMD */
+ >;
+ DS_FAST0;PULL_NONE;EDGE_NONE;SL_NORMAL;
+ };
+ sdh1_pmx_func2_fast: sdh1_pmx_func2_fast {
+ pinctrl-single,pins = <
+ TDS_DIO18 AF0 /* WLAN_CLK */
+ >;
+ DS_FAST0;PULL_DOWN;EDGE_NONE;SL_NORMAL;
+ };
+ sdh1_pmx_func1: sdh1_pmx_func1 {
+ pinctrl-single,pins = <
+ TDS_DIO13 AF0 /* WLAN_DAT3 */
+ TDS_DIO14 AF0 /* WLAN_DAT2 */
+ TDS_DIO15 AF0 /* WLAN_DAT1 */
+ TDS_DIO16 AF0 /* WLAN_DAT0 */
+ TDS_DIO17 AF0 /* WLAN_CMD */
+ >;
+ DS_MEDIUM;PULL_NONE;EDGE_NONE;SL_LOW;
+ };
+ sdh1_pmx_func2: sdh1_pmx_func2 {
+ pinctrl-single,pins = <
+ TDS_DIO18 AF0 /* WLAN_CLK */
+ >;
+ DS_MEDIUM;PULL_DOWN;EDGE_NONE;SL_LOW;
+ };
+ sdh1_pmx_func3: sdh1_pmx_func3 {
+ pinctrl-single,pins = <
+ GPIO10 AF0 /* VCXO_REQ AF1 WLAN_WAKE_HOST */
+ >;
+ MFP_PULL_DOWN;
+ };
+ sdh1_pmx_edge_wakeup: sdh1_pmx_edge_wakeup {
+ pinctrl-single,pins = <
+ GPIO10 AF0 /* VCXO_REQ AF1 */
+ >;
+ DS_MEDIUM;PULL_DOWN;EDGE_RISE;SL_NORMAL;
+ };
+ sdh1_pmx_pd_rst_off: sdh1_pmx_pd_rst_off {
+ pinctrl-single,pins = <
+ GPIO11 AF0 /* GPIO31 AF0 WLAN_PDn */
+ GPIO13 AF0 /* GPIO32 AF0 LDO_EN */
+ >;
+ MFP_PULL_DOWN;
+ };
+ sdh1_pmx_pd_rst_on: sdh1_pmx_pd_rst_on {
+ pinctrl-single,pins = <
+ GPIO11 AF0 /* GPIO31 AF0 WLAN_PDn */
+ GPIO13 AF0 /* GPIO32 AF0 LDO_EN */
+ >;
+ MFP_PULL_UP;
+ };
+ eta6005_charger_en: eta6005_charger_en {
+ pinctrl-single,pins = <
+ GPIO08 AF0
+ >;
+ MFP_PULL_UP;
+ };
+ eta6005_charger_stat: eta6005_charger_stat {
+ pinctrl-single,pins = <
+ GPIO04 AF0
+ >;
+ MFP_DEFAULT;
+ };
+
+ otg_vbus_func: otg_vbus_func {
+ pinctrl-single,pins = <
+ VBUS_DRV AF1 /* GPIO[122] */
+ >;
+ DS_MEDIUM;PULL_DOWN;EDGE_NONE;
+ };
+
+ emac_pmx_func0: emac_pmx_func0 {
+ pinctrl-single,pins = <
+ GPIO00 AF1 /* GMAC1_RX_DV */
+ GPIO01 AF1 /* GMAC1_RX_D0 */
+ GPIO02 AF1 /* GMAC1_RX_D1 */
+ GPIO03 AF1 /* GMAC1_RX_CLK */
+ /* GPIO04 AF1 GMAC1_RX_D2 */
+ /* GPIO05 AF1 GMAC1_RX_D3 */
+ GPIO06 AF1 /* GMAC1_TX_D0 */
+ GPIO07 AF1 /* GMAC1_TX_D1 */
+ /* GPIO12 AF1 GMAC1_TX_CLK */
+ /* GPIO13 AF1 GMAC1_TX_D2 */
+ /* GPIO14 AF1 GMAC1_TX_D3 */
+ GPIO15 AF1 /* GMAC1_TX_EN */
+ GPIO16 AF1 /* GMAC1_TX_MDC */
+ /* GPIO17 AF1 GMAC1_TX_MDIO */
+ >;
+ DS_MEDIUM;PULL_DOWN;EDGE_NONE;SL_NORMAL;
+ };
+ emac_pmx_func1: emac_pmx_func1 {
+ pinctrl-single,pins = <
+ GPIO04 AF1 /* GMAC1_RX_D2 */
+ GPIO05 AF1 /* GMAC1_RX_D3 */
+ GPIO12 AF1 /* GMAC1_TX_CLK */
+ GPIO13 AF1 /* GMAC1_TX_D2 */
+ GPIO14 AF1 /* GMAC1_TX_D3 */
+ >;
+ DS_MEDIUM;PULL_DOWN;EDGE_NONE;SL_NORMAL;
+ };
+ emac_pmx_func2: emac_pmx_func2 {
+ pinctrl-single,pins = <
+ GPIO17 AF1 /* GMAC1_TX_MDIO */
+ GPIO18 AF1 /* GMAC1_TX_INT_N */
+ >;
+ DS_MEDIUM;PULL_UP;EDGE_NONE;SL_NORMAL;
+ };
+ emac_pmx_func3: emac_pmx_func3 {
+ pinctrl-single,pins = <
+ GPIO23 AF0 /* RESET */
+ /* GPIO54 AF0 LDO_EN */
+ >;
+ DS_SLOW0;PULL_FLOAT;EDGE_NONE;SL_NORMAL;
+ };
+ usim1_pmx_func: usim1_pmx_func {
+ pinctrl-single,pins = <
+ GPIO19 AF0
+ >;
+ DS_MEDIUM;PULL_UP;EDGE_NONE;SL_NORMAL;
+ };
+ usim1_pmx_func_sleep: usim1_pmx_func_sleep {
+ pinctrl-single,pins = <
+ GPIO19 AF0
+ >;
+ DS_MEDIUM;PULL_UP;EDGE_BOTH;SL_NORMAL;
+ };
+ gpiokey_pmx_func: gpiokey_pmx_func {
+ pinctrl-single,pins = <
+ GPIO09 AF0
+ >;
+ DS_MEDIUM;PULL_UP;EDGE_NONE;SL_NORMAL;
+ };
+ };
+
+ ssp0: spi@d401b000 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&ssp0_pmx_func>;
+ asr,spi-inc-mode;
+ /* asr,spi-pio-interval = <6>; */
+#ifdef CONFIG_FB_SPI_LCD
+ /* this enhancemnet feature is not suitable for
+ 3 line 9bits spi lcd. */
+ /* asr,ssp-enhancement; */
+
+ lcd: spidev@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "spilcd";
+ pinctrl-names = "default";
+ pinctrl-0 = <&lcd_bl_func>;
+ reg = <0>;
+ /* ST7735: need to set spi-max-frequency to 26M
+ * ST7789V: can set spi-max-frequency to 52M
+ */
+ spi-max-frequency = <26000000>;
+ xres = <128>;
+ yres = <128>;
+ bits = <8>; /* 8: 4line, 9: 3line */
+ rst_gpio = <&gpio 24 0>;
+ bl_gpio = <&gpio 126 0>;
+ rs_gpio = <&gpio 22 0>;
+ /* if comment the following statement, it means
+ * the avdd is sit on the "always-on" ldo.
+ */
+ /* avdd-supply = <&LDO1>; */
+ };
+#endif
+ };
+ twsi0: i2c@d4011000 {
+ status= "okay";
+
+ /*
+ pmic4: 88pm805@38 {
+ compatible = "marvell,88pm805";
+ reg = <0x38>;
+ };
+ */
+ };
+
+ twsi2: i2c@d4037000 {
+ status = "okay";
+
+ pmic5: pm802@0 {
+ compatible = "asr,pm802";
+ reg = <0x00>;
+ interrupts = <4>;
+ interrupt-parent = <&intc>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ chg_irq_from_exton;
+ battery {
+ compatible = "asr,pm802-bat";
+ status = "disabled";
+
+ online-gpadc = <1>;
+ temperature-gpadc = <1>;
+
+ hi-volt-online = <1150>; /* mV */
+ lo-volt-online = <20>; /* mV */
+ hi-volt-temp = <1150>; /* mV */
+ lo-volt-temp = <200>; /* mV */
+
+ sw-fg-use-ntc;
+ full-capacity = <2050>; /* mAh */
+ r1-resistor = <40>; /* mohm */
+ r2-resistor = <30>; /* mohm */
+ rs-resistor = <120>; /* mohm */
+ roff-resistor = <0>; /* mohm */
+ roff-initial-resistor = <0>; /* mohm */
+
+ times-in-zero-degree = <1>;
+ offset-in-zero-degree = <0>;
+
+ times-in-ten-degree = <2>;
+ offset-in-ten-degree = <100>;
+
+ power-off-threshold = <3350>; /* mV */
+ safe-power-off-threshold = <3200>; /* mV */
+
+ online-gp-bias-curr = <11>; /* uA */
+
+ soc-ramp-up-interval = <150>; /* s */
+ /* choose -20C, 0C, 10C, 40C, 45C, 55C as threshold */
+ tbat-threshold = <20 0 10 40 45 55>; /* ohm */
+ ntc-table-size = <88>;
+ stop-chg-for-vbatmeas;
+ /* -24C, -23C, ..., 62C, 63C */
+ ntc-table = <
+ 89680 85130 80840 76790 72970 69360 65960 62740
+ 59700 56830 54130 51530 49100 46800 44610 42550
+ 40590 38730 36970 35300 33710 32210 30780 29420
+ 28130 26910 25750 24640 23590 22580 21630 20720
+ 19860 19030 18250 17500 16790 16110 15460 14840
+ 14250 13690 13150 12640 12150 11680 11230 10800
+ 10390 10000 9620 9270 8920 8590 8280 7980
+ 7690 7410 7150 6890 6650 6410 6190 5970
+ 5770 5570 5380 5190 5020 4850 4680 4530
+ 4380 4230 4100 3960 3830 3710 3590 3480
+ 3370 3260 3160 3060 2960 2870 2780 2700
+ >;
+ };
+ usb {
+ status = "disabled";
+ vbus_gpio = <0xff>; /* set_vbus */
+ id-gpadc = <0xff>; /* usb-id */
+ vchg-from-exton = <1>;
+ vbus-detect = <1>; /* vbus-irq */
+ get-vbus = <1>; /* get-vbus */
+ };
+ };
+ pmic6: pm803@30 {
+ compatible = "asr,pm803";
+ reg = <0x30>;
+ interrupts = <4>;
+ interrupt-parent = <&intc>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ chg_irq_from_exton;
+ battery {
+ compatible = "asr,pm803-bat";
+ status = "disabled";
+
+ online-gpadc = <1>;
+ temperature-gpadc = <1>;
+
+ hi-volt-online = <1150>; /* mV */
+ lo-volt-online = <20>; /* mV */
+ hi-volt-temp = <1150>; /* mV */
+ lo-volt-temp = <200>; /* mV */
+
+ sw-fg-use-ntc;
+ full-capacity = <2050>; /* mAh */
+ r1-resistor = <40>; /* mohm */
+ r2-resistor = <30>; /* mohm */
+ rs-resistor = <120>; /* mohm */
+ roff-resistor = <0>; /* mohm */
+ roff-initial-resistor = <0>; /* mohm */
+
+ times-in-zero-degree = <1>;
+ offset-in-zero-degree = <0>;
+
+ times-in-ten-degree = <2>;
+ offset-in-ten-degree = <100>;
+
+ power-off-threshold = <3350>; /* mV */
+ safe-power-off-threshold = <3200>; /* mV */
+
+ online-gp-bias-curr = <11>; /* uA */
+
+ soc-ramp-up-interval = <150>; /* s */
+ /* choose -20C, 0C, 10C, 40C, 45C, 55C as threshold */
+ tbat-threshold = <20 0 10 40 45 55>; /* ohm */
+ ntc-table-size = <88>;
+ stop-chg-for-vbatmeas;
+ /* -24C, -23C, ..., 62C, 63C */
+ ntc-table = <
+ 89680 85130 80840 76790 72970 69360 65960 62740
+ 59700 56830 54130 51530 49100 46800 44610 42550
+ 40590 38730 36970 35300 33710 32210 30780 29420
+ 28130 26910 25750 24640 23590 22580 21630 20720
+ 19860 19030 18250 17500 16790 16110 15460 14840
+ 14250 13690 13150 12640 12150 11680 11230 10800
+ 10390 10000 9620 9270 8920 8590 8280 7980
+ 7690 7410 7150 6890 6650 6410 6190 5970
+ 5770 5570 5380 5190 5020 4850 4680 4530
+ 4380 4230 4100 3960 3830 3710 3590 3480
+ 3370 3260 3160 3060 2960 2870 2780 2700
+ >;
+ };
+ usb {
+ status = "disabled";
+ vbus_gpio = <0xff>; /* set_vbus */
+ id-gpadc = <0xff>; /* usb-id */
+ vchg-from-exton = <1>;
+ vbus-detect = <1>; /* vbus-irq */
+ get-vbus = <1>; /* get-vbus */
+ };
+ };
+ };
+ };
+ };
+
+ vcc_sdh1: sd-regulator {
+ compatible = "regulator-fixed";
+ pinctrl-names = "default";
+ pinctrl-0 = <&sd_ldo_en>;/*conflict with audio-pa*/
+ regulator-name = "SDH1 VCC";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ gpio = <&gpio 12 0>;/*conflict with audio-pa*/
+ enable-active-high;
+ };
+
+ asr-rfkill {
+ compatible = "asr,asr-rfkill";
+ pinctrl-names = "off", "on";
+ pinctrl-0 = <&sdh1_pmx_pd_rst_off>;
+ pinctrl-1 = <&sdh1_pmx_pd_rst_on>;
+ sd-host = <&sdh1>;
+ pd-gpio = <&gpio 11 0>;
+#if 1 /* ASR5803 RTL8192ES */
+ 3v3-ldo-gpio = <&gpio 13 0>;
+ edge-wakeup-gpio = <&gpio 10 0>;
+#else /* AIC8800DW/AIC8800D80 */
+ host-wakeup-wlan-gpio = <&gpio 13 0>;
+ wlan-wakeup-host-gpio = <&gpio 10 0>;
+ rst-gpio = <&gpio 14 0>;
+#endif
+ status = "okay";
+ };
+
+ usim1: usim {
+ compatible = "asr,usim1";
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&usim1_pmx_func>;
+ pinctrl-1 = <&usim1_pmx_func_sleep>;
+ edge_detect_gpio = <19>; /* GPIO19: SIM detect pin */
+ status = "okay";
+ };
+
+ gpio_keys {
+ compatible = "gpio-keys";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ /* autorepeat; */
+ pinctrl-names = "default";
+ pinctrl-0 = <&gpiokey_pmx_func>;
+ button@1 {
+ label = "qrcode-key";
+ linux,code = <139>; /* KEY_MENU, refer to linux/input.h */
+ /* NOTE:
+ * We use the FORCE DOWNLOAD key to implement the qrcode key in DKB.
+ * Customer SHOULD change it to any other gpios.
+ * Because user may do the misoperation that
+ * powerup with FDL key pressed,
+ * then the borad will enter force download mode.
+ */
+ gpios = <&gpio 9 1>;
+ gpio-key,wakeup;
+ };
+ };
+};
+#include "asr_pm802.dtsi"
+#include "asr_pm803.dtsi"
+#include "asr1803_spinor_layout.dtsi"