ASR_BASE
Change-Id: Icf3719cc0afe3eeb3edc7fa80a2eb5199ca9dda1
diff --git a/marvell/linux/arch/arm/mach-nspire/Kconfig b/marvell/linux/arch/arm/mach-nspire/Kconfig
new file mode 100644
index 0000000..b3d161e
--- /dev/null
+++ b/marvell/linux/arch/arm/mach-nspire/Kconfig
@@ -0,0 +1,13 @@
+# SPDX-License-Identifier: GPL-2.0-only
+config ARCH_NSPIRE
+ bool "TI-NSPIRE based"
+ depends on ARCH_MULTI_V4_V5
+ depends on MMU
+ select CPU_ARM926T
+ select GENERIC_IRQ_CHIP
+ select ARM_AMBA
+ select ARM_VIC
+ select ARM_TIMER_SP804
+ select NSPIRE_TIMER
+ help
+ This enables support for systems using the TI-NSPIRE CPU
diff --git a/marvell/linux/arch/arm/mach-nspire/Makefile b/marvell/linux/arch/arm/mach-nspire/Makefile
new file mode 100644
index 0000000..4716b9b
--- /dev/null
+++ b/marvell/linux/arch/arm/mach-nspire/Makefile
@@ -0,0 +1,2 @@
+# SPDX-License-Identifier: GPL-2.0-only
+obj-y += nspire.o
diff --git a/marvell/linux/arch/arm/mach-nspire/mmio.h b/marvell/linux/arch/arm/mach-nspire/mmio.h
new file mode 100644
index 0000000..48e32f1
--- /dev/null
+++ b/marvell/linux/arch/arm/mach-nspire/mmio.h
@@ -0,0 +1,16 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * linux/arch/arm/mach-nspire/mmio.h
+ *
+ * Copyright (C) 2013 Daniel Tang <tangrs@tangrs.id.au>
+ */
+
+#define NSPIRE_MISC_PHYS_BASE 0x900A0000
+#define NSPIRE_MISC_HWRESET 0x08
+
+#define NSPIRE_PWR_PHYS_BASE 0x900B0000
+#define NSPIRE_PWR_VIRT_BASE 0xFEEB0000
+#define NSPIRE_PWR_BUS_DISABLE1 0x18
+#define NSPIRE_PWR_BUS_DISABLE2 0x20
+
+#define NSPIRE_LCD_PHYS_BASE 0xC0000000
diff --git a/marvell/linux/arch/arm/mach-nspire/nspire.c b/marvell/linux/arch/arm/mach-nspire/nspire.c
new file mode 100644
index 0000000..2d4abb0
--- /dev/null
+++ b/marvell/linux/arch/arm/mach-nspire/nspire.c
@@ -0,0 +1,42 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * linux/arch/arm/mach-nspire/nspire.c
+ *
+ * Copyright (C) 2013 Daniel Tang <tangrs@tangrs.id.au>
+ */
+#include <linux/init.h>
+#include <linux/of_irq.h>
+#include <linux/of_address.h>
+#include <linux/of_platform.h>
+#include <linux/irqchip.h>
+#include <linux/irqchip/arm-vic.h>
+#include <linux/clkdev.h>
+#include <linux/amba/bus.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach-types.h>
+#include <asm/mach/map.h>
+
+#include "mmio.h"
+
+static const char *const nspire_dt_match[] __initconst = {
+ "ti,nspire",
+ "ti,nspire-cx",
+ "ti,nspire-tp",
+ "ti,nspire-clp",
+ NULL,
+};
+
+static void nspire_restart(enum reboot_mode mode, const char *cmd)
+{
+ void __iomem *base = ioremap(NSPIRE_MISC_PHYS_BASE, SZ_4K);
+ if (!base)
+ return;
+
+ writel(2, base + NSPIRE_MISC_HWRESET);
+}
+
+DT_MACHINE_START(NSPIRE, "TI-NSPIRE")
+ .dt_compat = nspire_dt_match,
+ .restart = nspire_restart,
+MACHINE_END