ASR_BASE
Change-Id: Icf3719cc0afe3eeb3edc7fa80a2eb5199ca9dda1
diff --git a/marvell/linux/arch/sh/include/cpu-common/cpu/addrspace.h b/marvell/linux/arch/sh/include/cpu-common/cpu/addrspace.h
new file mode 100644
index 0000000..d8bf5d7
--- /dev/null
+++ b/marvell/linux/arch/sh/include/cpu-common/cpu/addrspace.h
@@ -0,0 +1,16 @@
+/* SPDX-License-Identifier: GPL-2.0
+ *
+ * Definitions for the address spaces of the SH-2 CPUs.
+ *
+ * Copyright (C) 2003 Paul Mundt
+ */
+#ifndef __ASM_CPU_SH2_ADDRSPACE_H
+#define __ASM_CPU_SH2_ADDRSPACE_H
+
+#define P0SEG 0x00000000
+#define P1SEG 0x80000000
+#define P2SEG 0xa0000000
+#define P3SEG 0xc0000000
+#define P4SEG 0xe0000000
+
+#endif /* __ASM_CPU_SH2_ADDRSPACE_H */
diff --git a/marvell/linux/arch/sh/include/cpu-common/cpu/mmu_context.h b/marvell/linux/arch/sh/include/cpu-common/cpu/mmu_context.h
new file mode 100644
index 0000000..cef3a30
--- /dev/null
+++ b/marvell/linux/arch/sh/include/cpu-common/cpu/mmu_context.h
@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: GPL-2.0
+ *
+ * include/asm-sh/cpu-sh2/mmu_context.h
+ *
+ * Copyright (C) 2003 Paul Mundt
+ */
+#ifndef __ASM_CPU_SH2_MMU_CONTEXT_H
+#define __ASM_CPU_SH2_MMU_CONTEXT_H
+
+/* No MMU */
+
+#endif /* __ASM_CPU_SH2_MMU_CONTEXT_H */
+
diff --git a/marvell/linux/arch/sh/include/cpu-common/cpu/pfc.h b/marvell/linux/arch/sh/include/cpu-common/cpu/pfc.h
new file mode 100644
index 0000000..879d2c9
--- /dev/null
+++ b/marvell/linux/arch/sh/include/cpu-common/cpu/pfc.h
@@ -0,0 +1,18 @@
+/* SPDX-License-Identifier: GPL-2.0
+ *
+ * SH Pin Function Control Initialization
+ *
+ * Copyright (C) 2012 Renesas Solutions Corp.
+ */
+
+#ifndef __ARCH_SH_CPU_PFC_H__
+#define __ARCH_SH_CPU_PFC_H__
+
+#include <linux/types.h>
+
+struct resource;
+
+int sh_pfc_register(const char *name,
+ struct resource *resource, u32 num_resources);
+
+#endif /* __ARCH_SH_CPU_PFC_H__ */
diff --git a/marvell/linux/arch/sh/include/cpu-common/cpu/rtc.h b/marvell/linux/arch/sh/include/cpu-common/cpu/rtc.h
new file mode 100644
index 0000000..5fe726a
--- /dev/null
+++ b/marvell/linux/arch/sh/include/cpu-common/cpu/rtc.h
@@ -0,0 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef __ASM_SH_CPU_SH2_RTC_H
+#define __ASM_SH_CPU_SH2_RTC_H
+
+#define rtc_reg_size sizeof(u16)
+#define RTC_BIT_INVERTED 0
+#define RTC_DEF_CAPABILITIES 0UL
+
+#endif /* __ASM_SH_CPU_SH2_RTC_H */
diff --git a/marvell/linux/arch/sh/include/cpu-common/cpu/sigcontext.h b/marvell/linux/arch/sh/include/cpu-common/cpu/sigcontext.h
new file mode 100644
index 0000000..e005dd1
--- /dev/null
+++ b/marvell/linux/arch/sh/include/cpu-common/cpu/sigcontext.h
@@ -0,0 +1,18 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef __ASM_CPU_SH2_SIGCONTEXT_H
+#define __ASM_CPU_SH2_SIGCONTEXT_H
+
+struct sigcontext {
+ unsigned long oldmask;
+
+ /* CPU registers */
+ unsigned long sc_regs[16];
+ unsigned long sc_pc;
+ unsigned long sc_pr;
+ unsigned long sc_sr;
+ unsigned long sc_gbr;
+ unsigned long sc_mach;
+ unsigned long sc_macl;
+};
+
+#endif /* __ASM_CPU_SH2_SIGCONTEXT_H */
diff --git a/marvell/linux/arch/sh/include/cpu-common/cpu/timer.h b/marvell/linux/arch/sh/include/cpu-common/cpu/timer.h
new file mode 100644
index 0000000..af51438
--- /dev/null
+++ b/marvell/linux/arch/sh/include/cpu-common/cpu/timer.h
@@ -0,0 +1,7 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef __ASM_CPU_SH2_TIMER_H
+#define __ASM_CPU_SH2_TIMER_H
+
+/* Nothing needed yet */
+
+#endif /* __ASM_CPU_SH2_TIMER_H */