ASR_BASE
Change-Id: Icf3719cc0afe3eeb3edc7fa80a2eb5199ca9dda1
diff --git a/marvell/linux/drivers/crypto/asr/asr-rng.h b/marvell/linux/drivers/crypto/asr/asr-rng.h
new file mode 100644
index 0000000..74cfce6
--- /dev/null
+++ b/marvell/linux/drivers/crypto/asr/asr-rng.h
@@ -0,0 +1,50 @@
+#ifndef _ASR_RNG_H_
+#define _ASR_RNG_H_
+
+#include <crypto/aes.h>
+#include <linux/crypto.h>
+#include <crypto/algapi.h>
+#include <linux/interrupt.h>
+#include <linux/mutex.h>
+#include <linux/miscdevice.h>
+
+#define RNG_SYTE_CNT (0x04)
+#define RNG_SRC_ADDR (0x14)
+#define RNG_DEST_ADDR (0x24)
+#define RNG_NEXTDEST_ADDR (0x34)
+#define RNG_SQU_CTRL (0x44)
+#define RNG_CURR_DESC_PTR (0x74)
+#define RNG_INT_MASK (0x84)
+#define RNG_INT_STATUS (0xa4)
+#define RNG_CTRL (0xc0)
+#define RNG_DATA (0xc4)
+#define RNG_SEED_VAL (0xc8)
+
+#define SQU_CTRL_FIFO_CLR (1 << 30)
+#define CTRL_RNG_VALID (1 << 31)
+#define CTRL_RNG_SEED_VALID (1 << 30)
+#define CTRL_RNG_SEED_EN (1 << 1)
+#define CTRL_RNG_EN (1 << 0)
+
+struct asr_rng {
+ struct device *dev;
+ unsigned long phys_base;
+ void __iomem *io_base;
+ void __iomem *seed_base;
+ struct hwrng *hwrng;
+ unsigned int rn_saved;
+
+ struct mutex rng_lock;
+ struct clk *rng_clk;
+ int clk_synced;
+ refcount_t refcount;
+
+ struct asr_rng_ops *rng_ops;
+};
+
+struct asr_rng_ops {
+ int (*dev_get)(struct asr_rng *);
+ int (*dev_put)(struct asr_rng *);
+};
+
+#endif
\ No newline at end of file