ASR_BASE

Change-Id: Icf3719cc0afe3eeb3edc7fa80a2eb5199ca9dda1
diff --git a/marvell/linux/drivers/mtd/nand/spi/esmt.c b/marvell/linux/drivers/mtd/nand/spi/esmt.c
new file mode 100644
index 0000000..5bf35e4
--- /dev/null
+++ b/marvell/linux/drivers/mtd/nand/spi/esmt.c
@@ -0,0 +1,106 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2021 ASR Micro Limited
+ *
+ * Authors:
+ *	Fei Lv <feilv@asrmicro.com>
+ */
+
+#include <linux/device.h>
+#include <linux/kernel.h>
+#include <linux/mtd/spinand.h>
+
+#define SPINAND_MFR_ESMT		0xC8
+
+static SPINAND_OP_VARIANTS(read_cache_variants,
+		SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
+
+static SPINAND_OP_VARIANTS(write_cache_variants,
+		SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
+		SPINAND_PROG_LOAD(true, 0, NULL, 0));
+
+static SPINAND_OP_VARIANTS(update_cache_variants,
+		SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
+		SPINAND_PROG_LOAD(false, 0, NULL, 0));
+
+static int f50d1g41lb_ooblayout_ecc(struct mtd_info *mtd, int section,
+				  struct mtd_oob_region *region)
+{
+	if (section > 3)
+		return -ERANGE;
+
+	region->offset = (16 * section) + 8;
+	region->length = 8;
+
+	return 0;
+}
+
+static int f50d1g41lb_ooblayout_free(struct mtd_info *mtd, int section,
+				   struct mtd_oob_region *region)
+{
+	if (section > 3)
+		return -ERANGE;
+
+	region->offset = (16 * section) + 2;
+	region->length = 6;
+
+	return 0;
+}
+
+static const struct mtd_ooblayout_ops f50d1g41lb_ooblayout = {
+	.ecc = f50d1g41lb_ooblayout_ecc,
+	.free = f50d1g41lb_ooblayout_free,
+};
+
+static const struct spinand_info esmt_spinand_table[] = {
+	SPINAND_INFO("F50D1G41LB", 0x11,
+		     NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
+		     NAND_ECCREQ(1, 512),
+		     SPINAND_INFO_OP_VARIANTS_TIMING(
+					      &read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants,
+					      15, 2, 2, 52000000),
+		     0,
+		     SPINAND_ECCINFO(&f50d1g41lb_ooblayout, NULL)),
+};
+
+/**
+ * esmt_spinand_detect - initialize device related part in spinand_device
+ * struct if it is a Winbond device.
+ * @spinand: SPI NAND device structure
+ */
+static int esmt_spinand_detect(struct spinand_device *spinand)
+{
+	u8 *id = spinand->id.data;
+	int ret;
+
+	/*
+	 * Winbond SPI NAND read ID need a dummy byte,
+	 * so the first byte in raw_id is dummy.
+	 */
+	if (id[1] != SPINAND_MFR_ESMT)
+		return 0;
+
+	ret = spinand_match_and_init(spinand, esmt_spinand_table,
+				     ARRAY_SIZE(esmt_spinand_table), id[2]);
+	if (ret)
+		return ret;
+
+	return 1;
+}
+
+static const struct spinand_manufacturer_ops esmt_spinand_manuf_ops = {
+	.detect = esmt_spinand_detect,
+};
+
+const struct spinand_manufacturer esmt_spinand_manufacturer = {
+	.id = SPINAND_MFR_ESMT,
+	.name = "ESMT",
+	.ops = &esmt_spinand_manuf_ops,
+};