ASR_BASE
Change-Id: Icf3719cc0afe3eeb3edc7fa80a2eb5199ca9dda1
diff --git a/marvell/linux/drivers/mtd/nand/spi/silicongo.c b/marvell/linux/drivers/mtd/nand/spi/silicongo.c
new file mode 100644
index 0000000..14e13f1
--- /dev/null
+++ b/marvell/linux/drivers/mtd/nand/spi/silicongo.c
@@ -0,0 +1,114 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2021 ASR Micro Limited
+ *
+ * Authors:
+ * Fei Lv <feilv@asrmicro.com>
+ */
+
+#include <linux/device.h>
+#include <linux/kernel.h>
+#include <linux/mtd/spinand.h>
+
+#define SPINAND_MFR_SILICONGO 0xEA
+
+static SPINAND_OP_VARIANTS(read_cache_variants,
+ SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0),
+ SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
+ SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0),
+ SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
+ SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
+ SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
+
+static SPINAND_OP_VARIANTS(write_cache_variants,
+ SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
+ SPINAND_PROG_LOAD(true, 0, NULL, 0));
+
+static SPINAND_OP_VARIANTS(update_cache_variants,
+ SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
+ SPINAND_PROG_LOAD(false, 0, NULL, 0));
+
+static int sgm7000i_ooblayout_ecc(struct mtd_info *mtd, int section,
+ struct mtd_oob_region *region)
+{
+ if (section > 3)
+ return -ERANGE;
+
+ region->offset = (16 * section) + 8;
+ region->length = 8;
+
+ return 0;
+}
+
+static int sgm7000i_ooblayout_free(struct mtd_info *mtd, int section,
+ struct mtd_oob_region *region)
+{
+ return -ERANGE;
+}
+
+static const struct mtd_ooblayout_ops sgm7000i_ooblayout = {
+ .ecc = sgm7000i_ooblayout_ecc,
+ .free = sgm7000i_ooblayout_free,
+};
+
+static const struct spinand_info silicongo_spinand_table[] = {
+ SPINAND_INFO("SGM7000I-S24W1GH", 0xC1,
+ NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
+ NAND_ECCREQ(4, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ 0,
+ SPINAND_ECCINFO(&sgm7000i_ooblayout, NULL)),
+ SPINAND_INFO("SGM7000I-S24W1GH", 0xC2,
+ NAND_MEMORG(1, 2048, 64, 64, 2048, 20, 1, 1, 1),
+ NAND_ECCREQ(4, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ 0,
+ SPINAND_ECCINFO(&sgm7000i_ooblayout, NULL)),
+ SPINAND_INFO("SGM7000I-S25W4GH", 0xC4,
+ NAND_MEMORG(1, 2048, 64, 64, 4096, 20, 1, 1, 1),
+ NAND_ECCREQ(4, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ 0,
+ SPINAND_ECCINFO(&sgm7000i_ooblayout, NULL)),
+};
+
+/**
+ * silicongo_spinand_detect - initialize device related part in spinand_device
+ * struct if it is a Winbond device.
+ * @spinand: SPI NAND device structure
+ */
+static int silicongo_spinand_detect(struct spinand_device *spinand)
+{
+ u8 *id = spinand->id.data;
+ int ret;
+
+ /*
+ * Winbond SPI NAND read ID need a dummy byte,
+ * so the first byte in raw_id is dummy.
+ */
+ if (id[1] != SPINAND_MFR_SILICONGO)
+ return 0;
+
+ ret = spinand_match_and_init(spinand, silicongo_spinand_table,
+ ARRAY_SIZE(silicongo_spinand_table), id[2]);
+ if (ret)
+ return ret;
+
+ return 1;
+}
+
+static const struct spinand_manufacturer_ops silicongo_spinand_manuf_ops = {
+ .detect = silicongo_spinand_detect,
+};
+
+const struct spinand_manufacturer silicongo_spinand_manufacturer = {
+ .id = SPINAND_MFR_SILICONGO,
+ .name = "SiliconGo",
+ .ops = &silicongo_spinand_manuf_ops,
+};