ASR_BASE
Change-Id: Icf3719cc0afe3eeb3edc7fa80a2eb5199ca9dda1
diff --git a/marvell/linux/drivers/usb/host/ehci-mv.c b/marvell/linux/drivers/usb/host/ehci-mv.c
new file mode 100644
index 0000000..9d2d37b
--- /dev/null
+++ b/marvell/linux/drivers/usb/host/ehci-mv.c
@@ -0,0 +1,395 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2011 Marvell International Ltd. All rights reserved.
+ * Author: Chao Xie <chao.xie@marvell.com>
+ * Neil Zhang <zhangwm@marvell.com>
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/clk.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/err.h>
+#include <linux/usb/otg.h>
+#include <linux/platform_data/mv_usb.h>
+#include <linux/io.h>
+#include <linux/usb/mv_usb2_phy.h>
+#include <linux/usb/hcd.h>
+#include <linux/cputype.h>
+#include <linux/pm_qos.h>
+#include "ehci.h"
+
+/* registers */
+#define U2x_CAPREGS_OFFSET 0x100
+
+#define CAPLENGTH_MASK (0xff)
+
+#define hcd_to_ehci_hcd_mv(h) ((struct ehci_hcd_mv *)hcd_to_ehci(h)->priv)
+
+struct ehci_hcd_mv {
+ struct usb_hcd *hcd;
+ struct usb_phy *phy;
+
+ /* Which mode does this ehci running OTG/Host ? */
+ int mode;
+
+ void __iomem *base;
+ void __iomem *cap_regs;
+ void __iomem *op_regs;
+
+ struct usb_phy *otg;
+
+ struct mv_usb_platform_data *pdata;
+
+ struct clk *clk;
+
+ int (*set_vbus)(unsigned int vbus);
+
+#ifdef CONFIG_CPU_ASR18XX
+ struct pm_qos_request qos_idle;
+ s32 lpm_qos;
+#endif
+};
+
+static int mv_ehci_enable(struct ehci_hcd_mv *ehci_mv)
+{
+ int retval;
+
+ retval = clk_prepare_enable(ehci_mv->clk);
+ if (retval) {
+ pr_err("%s: clk_prepare_enable failed\n", __func__);
+ return retval;
+ }
+
+ retval = usb_phy_init(ehci_mv->phy);
+ if (retval) {
+ pr_err("%s: usb phy init failed\n", __func__);
+ clk_disable_unprepare(ehci_mv->clk);
+ }
+ return retval;
+}
+
+static void mv_ehci_disable(struct ehci_hcd_mv *ehci_mv)
+{
+ usb_phy_shutdown(ehci_mv->phy);
+ clk_disable_unprepare(ehci_mv->clk);
+}
+
+static int mv_ehci_reset(struct usb_hcd *hcd)
+{
+ struct device *dev = hcd->self.controller;
+ struct ehci_hcd_mv *ehci_mv = hcd_to_ehci_hcd_mv(hcd);
+ int retval;
+
+ if (ehci_mv == NULL) {
+ dev_err(dev, "Can not find private ehci data\n");
+ return -ENODEV;
+ }
+
+ hcd->has_tt = 1;
+
+ retval = ehci_setup(hcd);
+ if (retval)
+ dev_err(dev, "ehci_setup failed %d\n", retval);
+
+ return retval;
+}
+
+static struct hc_driver __read_mostly ehci_platform_hc_driver;
+
+static const struct ehci_driver_overrides platform_overrides __initconst = {
+ .reset = mv_ehci_reset,
+ .extra_priv_size = sizeof(struct ehci_hcd_mv),
+};
+
+static int mv_ehci_probe(struct platform_device *pdev)
+{
+ struct mv_usb_platform_data *pdata = dev_get_platdata(&pdev->dev);
+ struct usb_hcd *hcd;
+ struct ehci_hcd *ehci;
+ struct ehci_hcd_mv *ehci_mv;
+ struct resource *r;
+ int retval = -ENODEV;
+ u32 offset;
+ const __be32 *prop;
+ unsigned int proplen;
+
+ if (!pdata) {
+ dev_err(&pdev->dev, "missing platform_data\n");
+ return -ENODEV;
+ }
+ if (usb_disabled()) {
+ pr_err("usb disabled\n");
+ return -ENODEV;
+ }
+ hcd = usb_create_hcd(&ehci_platform_hc_driver, &pdev->dev, "mv ehci");
+ if (!hcd) {
+ pr_err("usb_create_hcd failed\n");
+ return -ENOMEM;
+ }
+ platform_set_drvdata(pdev, hcd);
+ ehci_mv = hcd_to_ehci_hcd_mv(hcd);
+
+ ehci_mv->mode = MV_USB_MODE_HOST;
+ if (pdata) {
+ ehci_mv->mode = pdata->mode;
+ /* ehci_mv->set_vbus = pdata->set_vbus; */
+ }
+
+ ehci_mv->pdata = pdata;
+ ehci_mv->hcd = hcd;
+
+ ehci_mv->clk = devm_clk_get(&pdev->dev, NULL);
+ if (IS_ERR(ehci_mv->clk)) {
+ dev_err(&pdev->dev, "error getting clock\n");
+ retval = PTR_ERR(ehci_mv->clk);
+ goto err_clear_drvdata;
+ }
+
+ r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!r) {
+ dev_err(&pdev->dev, "no I/O memory resource defined\n");
+ retval = -ENODEV;
+ goto err_clear_drvdata;
+ }
+ ehci_mv->base = devm_ioremap_resource(&pdev->dev, r);
+ if (IS_ERR(ehci_mv->base)) {
+ retval = PTR_ERR(ehci_mv->base);
+ dev_err(&pdev->dev, "failed to map I/O memory\n");
+ goto err_clear_drvdata;
+ }
+ ehci_mv->phy = devm_usb_get_phy_dev(&pdev->dev, MV_USB2_PHY_INDEX);
+ if (IS_ERR_OR_NULL(ehci_mv->phy)) {
+ retval = PTR_ERR(ehci_mv->phy);
+ if (retval != -EPROBE_DEFER && retval != -ENODEV)
+ dev_err(&pdev->dev, "failed to get the outer phy\n");
+ else {
+ usb_put_hcd(hcd);
+ devm_kfree(&pdev->dev, ehci_mv);
+ platform_set_drvdata(pdev, NULL);
+ dev_err(&pdev->dev, "EPROBE_DEFER\n");
+ return -EPROBE_DEFER;
+ }
+ goto err_clear_drvdata;
+ }
+ retval = mv_ehci_enable(ehci_mv);
+ if (retval) {
+ dev_err(&pdev->dev, "init phy error %d\n", retval);
+ goto err_clear_drvdata;
+ }
+
+ ehci_mv->cap_regs =
+ (void __iomem *) ((unsigned long) ehci_mv->base + U2x_CAPREGS_OFFSET);
+ offset = readl(ehci_mv->cap_regs) & CAPLENGTH_MASK;
+ ehci_mv->op_regs =
+ (void __iomem *) ((unsigned long) ehci_mv->cap_regs + offset);
+
+ hcd->rsrc_start = r->start;
+ hcd->rsrc_len = resource_size(r);
+ hcd->regs = ehci_mv->op_regs;
+#if defined(CONFIG_CPU_ASR18XX)
+ hcd->usb_phy = ehci_mv->phy;
+ hcd->usb_phy->io_op_regs = ehci_mv->op_regs;
+#endif
+
+ retval = platform_get_irq(pdev, 0);
+ if (retval < 0) {
+ pr_err("platform_get_irq failed\n");
+ goto err_disable_clk;
+ }
+ hcd->irq = retval;
+
+ ehci = hcd_to_ehci(hcd);
+ ehci->caps = (struct ehci_caps *) ehci_mv->cap_regs;
+
+ if (ehci_mv->mode == MV_USB_MODE_OTG) {
+ ehci_mv->otg = devm_usb_get_phy_dev(&pdev->dev,
+ MV_USB2_OTG_PHY_INDEX);
+ if (IS_ERR(ehci_mv->otg)) {
+ retval = PTR_ERR(ehci_mv->otg);
+
+ if (retval == -ENXIO)
+ dev_info(&pdev->dev, "MV_USB_MODE_OTG "
+ "must have CONFIG_USB_PHY enabled\n");
+ else
+ dev_err(&pdev->dev,
+ "unable to find transceiver\n");
+ goto err_disable_clk;
+ }
+
+ retval = otg_set_host(ehci_mv->otg->otg, &hcd->self);
+ if (retval < 0) {
+ dev_err(&pdev->dev,
+ "unable to register with transceiver\n");
+ retval = -ENODEV;
+ goto err_disable_clk;
+ }
+ /* otg will enable clock before use as host */
+ mv_ehci_disable(ehci_mv);
+ } else {
+ prop = of_get_property(pdev->dev.of_node, "lpm-qos", &proplen);
+ if (!prop) {
+ pr_err("lpm-qos config in DT for mv_hsic_host is not defined\n");
+ goto err_disable_clk;
+ } else
+ ehci_mv->lpm_qos = be32_to_cpup(prop);
+
+ pxa_usb_extern_call(pdata->id, vbus, set_vbus, 1);
+ retval = usb_add_hcd(hcd, hcd->irq, IRQF_SHARED);
+ if (retval) {
+ dev_err(&pdev->dev,
+ "failed to add hcd with err %d\n", retval);
+ goto err_set_vbus;
+ } else {
+#ifdef CONFIG_CPU_ASR18XX
+ ehci_mv->qos_idle.name = pdev->name;
+ pm_qos_add_request(&ehci_mv->qos_idle, PM_QOS_CPUIDLE_BLOCK,
+ PM_QOS_CPUIDLE_BLOCK_DEFAULT_VALUE);
+ pm_qos_update_request(&ehci_mv->qos_idle, ehci_mv->lpm_qos);
+#endif
+ }
+ device_wakeup_enable(hcd->self.controller);
+ }
+
+ dev_info(&pdev->dev,
+ "successful find EHCI device with regs 0x%p irq %d"
+ " working in %s mode\n", hcd->regs, hcd->irq,
+ ehci_mv->mode == MV_USB_MODE_OTG ? "OTG" : "Host");
+
+ return 0;
+
+err_set_vbus:
+ pxa_usb_extern_call(pdata->id, vbus, set_vbus, 0);
+err_disable_clk:
+ mv_ehci_disable(ehci_mv);
+err_clear_drvdata:
+ platform_set_drvdata(pdev, NULL);
+ usb_put_hcd(hcd);
+
+ return retval;
+}
+
+static int mv_ehci_remove(struct platform_device *pdev)
+{
+ struct usb_hcd *hcd = platform_get_drvdata(pdev);
+ struct ehci_hcd_mv *ehci_mv = hcd_to_ehci_hcd_mv(hcd);
+
+ if (hcd->rh_registered)
+ usb_remove_hcd(hcd);
+
+#ifdef CONFIG_CPU_ASR18XX
+ pm_qos_update_request(&ehci_mv->qos_idle,
+ PM_QOS_CPUIDLE_BLOCK_DEFAULT_VALUE);
+ pm_qos_remove_request(&ehci_mv->qos_idle);
+#endif
+
+ if (!IS_ERR_OR_NULL(ehci_mv->otg))
+ otg_set_host(ehci_mv->otg->otg, NULL);
+
+ if (ehci_mv->mode == MV_USB_MODE_HOST) {
+ pxa_usb_extern_call(ehci_mv->pdata->id, vbus, set_vbus, 0);
+
+ mv_ehci_disable(ehci_mv);
+ }
+
+ platform_set_drvdata(pdev, NULL);
+
+ usb_put_hcd(hcd);
+
+ return 0;
+}
+
+MODULE_ALIAS("mv-ehci");
+
+static const struct platform_device_id ehci_id_table[] = {
+ {"pxa-u2oehci", PXA_U2OEHCI},
+ {"pxa-sph", PXA_SPH},
+ {"mmp3-hsic", MMP3_HSIC},
+ {"mmp3-fsic", MMP3_FSIC},
+ {},
+};
+
+static void mv_ehci_shutdown(struct platform_device *pdev)
+{
+ struct usb_hcd *hcd = platform_get_drvdata(pdev);
+
+ if (!hcd->rh_registered)
+ return;
+
+ if (hcd->driver->shutdown)
+ hcd->driver->shutdown(hcd);
+}
+
+#ifdef CONFIG_PM
+static int mv_ehci_suspend_noirq(struct device *dev)
+{
+ struct usb_hcd *hcd = dev_get_drvdata(dev);
+ struct ehci_hcd_mv *ehci_mv = hcd_to_ehci_hcd_mv(hcd);
+
+ if (ehci_mv && ehci_mv->mode != MV_USB_MODE_OTG)
+ pm_qos_update_request(&ehci_mv->qos_idle,
+ PM_QOS_CPUIDLE_BLOCK_DEFAULT_VALUE);
+ return 0;
+}
+
+static int mv_ehci_resume_noirq(struct device *dev)
+{
+ struct usb_hcd *hcd = dev_get_drvdata(dev);
+ struct ehci_hcd_mv *ehci_mv = hcd_to_ehci_hcd_mv(hcd);
+
+ if (ehci_mv && ehci_mv->mode != MV_USB_MODE_OTG)
+ pm_qos_update_request(&ehci_mv->qos_idle, ehci_mv->lpm_qos);
+
+ return 0;
+}
+
+static struct dev_pm_ops mv_ehci_pm_ops = {
+ .suspend_noirq = mv_ehci_suspend_noirq,
+ .resume_noirq = mv_ehci_resume_noirq,
+};
+#endif
+
+static const struct of_device_id ehci_mv_dt_ids[] = {
+ { .compatible = "marvell,pxau2o-ehci", },
+ {},
+};
+
+static struct platform_driver ehci_mv_driver = {
+ .probe = mv_ehci_probe,
+ .remove = mv_ehci_remove,
+ .shutdown = mv_ehci_shutdown,
+ .driver = {
+ .name = "mv-ehci",
+ .bus = &platform_bus_type,
+ .of_match_table = ehci_mv_dt_ids,
+#ifdef CONFIG_PM
+ .pm = &mv_ehci_pm_ops,
+#endif
+ },
+ .id_table = ehci_id_table,
+};
+
+static int __init ehci_platform_init(void)
+{
+ if (usb_disabled())
+ return -ENODEV;
+
+ ehci_init_driver(&ehci_platform_hc_driver, &platform_overrides);
+ return platform_driver_register(&ehci_mv_driver);
+}
+module_init(ehci_platform_init);
+
+static void __exit ehci_platform_cleanup(void)
+{
+ platform_driver_unregister(&ehci_mv_driver);
+}
+module_exit(ehci_platform_cleanup);
+
+MODULE_DESCRIPTION("Marvell EHCI driver");
+MODULE_AUTHOR("Chao Xie <chao.xie@marvell.com>");
+MODULE_AUTHOR("Neil Zhang <zhangwm@marvell.com>");
+MODULE_ALIAS("mv-ehci");
+MODULE_LICENSE("GPL");
+MODULE_DEVICE_TABLE(of, ehci_mv_dt_ids);