ASR_BASE
Change-Id: Icf3719cc0afe3eeb3edc7fa80a2eb5199ca9dda1
diff --git a/marvell/linux/include/soc/asr/mipsram_pm_event.h b/marvell/linux/include/soc/asr/mipsram_pm_event.h
new file mode 100755
index 0000000..7293a44
--- /dev/null
+++ b/marvell/linux/include/soc/asr/mipsram_pm_event.h
@@ -0,0 +1,64 @@
+/*
+ * This software program is licensed subject to the GNU General Public License
+ * (GPL).Version 2,June 1991, available at http://www.fsf.org/copyleft/gpl.html
+
+ * (C) Copyright 2015 Marvell International Ltd.
+ * All Rights Reserved
+ */
+
+#ifndef PXA_MIPSRAM_PM_EVNT_H
+#define PXA_MIPSRAM_PM_EVNT_H
+
+#include <linux/mipsram.h>
+
+/* definitions for MIPSRAM events
+ * enum Names are used only in code, but Numbers are used by
+ * offline-mipsram tool and therefore reserved
+ */
+/*0x00020000+enum=131072+enum*/
+enum {
+ /* clk op index */
+ PM_OP0_MIPSRAM = 0,
+ PM_OP1_MIPSRAM,
+ PM_OP2_MIPSRAM,
+ PM_OP3_MIPSRAM,
+ PM_OP4_MIPSRAM,
+ PM_OP5_MIPSRAM,
+ PM_OP6_MIPSRAM,
+ PM_OP7_MIPSRAM,
+/* Existing EXCELL's trace/numbers, could be re-used
+ PM_DDR_REQ_RECEIVED_MIPSRAM, @*08=131080*@
+ PM_DVFM_CONSTRAITNS_SET,
+ PM_DDR_REL_RECEIVED_MIPSRAM, @*0A=131082*@
+ PM_DVFM_CONSTRAITNS_RELEASED,
+ PM_EARLY_DDR_PREVENTING_LPM,
+ PP_HF_DDR_REQ_RECEIVED_MIPSRAM,
+ PP_HF_DDR_REQ_HANDHELD_MIPSRAM,
+ PP_HF_DDR_REL_RECEIVED_MIPSRAM, @*0F=131087*@
+ PP_HF_DDR_REL_HANDHELD_MIPSRAM,
+*/
+ MAX_NUMBER_OF_PP_MIPSRAM,
+ INVALID_PP_NUMBER_MIPSRAM = 0xFF
+};
+
+enum {
+/*
+* ::Basic PM traces already defined in mipsram.h
+* 0x00020100+enum=131328+enum
+* ENTER_IDLE_MIPS_RAM = OFFSET_LPM_MIPS_RAM,
+* EXIT_IDLE_MIPS_RAM,
+* ENTER_D2_MIPS_RAM,
+* EXIT_D2_MIPS_RAM,
+* INVALID_LPM_NUMBER_MIPS_RAM = 0x1FF,
+*
+* ::Extention:
+**/
+ ENTER_CGM_MIPS_RAM = WKSRC_PMIC_MIPS_RAM + 1,
+ EXIT_CGM_MIPS_RAM,
+ ENTER_D1_MIPS_RAM,
+ EXIT_D1_MIPS_RAM,
+ LPM_TRACE_MAX_NUMBER_MIPSRAM,
+ INVALID_LPM_NUMBER_MIPSRAM = 0x1FF,
+};
+
+#endif