ASR_BASE
Change-Id: Icf3719cc0afe3eeb3edc7fa80a2eb5199ca9dda1
diff --git a/marvell/uboot/arch/nds32/include/asm/system.h b/marvell/uboot/arch/nds32/include/asm/system.h
new file mode 100644
index 0000000..007e66b
--- /dev/null
+++ b/marvell/uboot/arch/nds32/include/asm/system.h
@@ -0,0 +1,72 @@
+/*
+ * Copyright (C) 2011 Andes Technology Corporation
+ * Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __ASM_NDS_SYSTEM_H
+#define __ASM_NDS_SYSTEM_H
+
+/*
+ * Interrupt configuring macros.
+ */
+
+extern int irq_flags;
+
+#define local_irq_enable() \
+ __asm__ __volatile__ ( \
+ "mfsr %0, $psw\n\t" \
+ "andi %0, %0, 0x1\n\t" \
+ "setgie.e\n\t" \
+ : \
+ : "r" (irq_flags) \
+ )
+
+#define local_irq_disable() \
+ do { \
+ int __tmp_dummy; \
+ __asm__ __volatile__ ( \
+ "mfsr %0, $psw\n\t" \
+ "andi %0, %0, 0x1\n\t" \
+ "setgie.d\n\t" \
+ "dsb\n\t" \
+ : "=r" (__tmp_dummy) \
+ ); \
+ } while (0)
+
+#define local_irq_save(x) \
+ __asm__ __volatile__ ( \
+ "mfsr %0, $psw\n\t" \
+ "andi %0, %0, 0x1\n\t" \
+ "setgie.d\n\t" \
+ "dsb\n\t" \
+ : "=&r" (x) \
+ )
+
+#define local_save_flags(x) \
+ __asm__ __volatile__ ( \
+ "mfsr %0, $psw\n\t" \
+ "andi %0, %0, 0x1\n\t" \
+ "setgie.e\n\t" \
+ "setgie.d\n\t" \
+ : "=r" (x) \
+ )
+
+#define irqs_enabled_from_flags(x) ((x) != 0x1f)
+
+#define local_irq_restore(x) \
+ do { \
+ if (irqs_enabled_from_flags(x)) \
+ local_irq_enable(); \
+ } while (0)
+
+/*
+ * Force strict CPU ordering.
+ */
+#define nop() asm volatile ("nop;\n\t" : : )
+#define mb() asm volatile ("" : : : "memory")
+#define rmb() asm volatile ("" : : : "memory")
+#define wmb() asm volatile ("" : : : "memory")
+
+#endif /* __ASM_NDS_SYSTEM_H */