ASR_BASE
Change-Id: Icf3719cc0afe3eeb3edc7fa80a2eb5199ca9dda1
diff --git a/marvell/uboot/drivers/spi/spi.c b/marvell/uboot/drivers/spi/spi.c
new file mode 100644
index 0000000..7ddea9b
--- /dev/null
+++ b/marvell/uboot/drivers/spi/spi.c
@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2011 The Chromium OS Authors.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <fdtdec.h>
+#include <malloc.h>
+#include <spi.h>
+
+int spi_set_wordlen(struct spi_slave *slave, unsigned int wordlen)
+{
+ if (wordlen == 0 || wordlen > 32) {
+ printf("spi: invalid wordlen %d\n", wordlen);
+ return -1;
+ }
+
+ slave->wordlen = wordlen;
+
+ return 0;
+}
+
+void *spi_do_alloc_slave(int offset, int size, unsigned int bus,
+ unsigned int cs)
+{
+ struct spi_slave *slave;
+ void *ptr;
+
+ ptr = malloc(size);
+ if (ptr) {
+ memset(ptr, '\0', size);
+ slave = (struct spi_slave *)(ptr + offset);
+ slave->bus = bus;
+ slave->cs = cs;
+ slave->wordlen = SPI_DEFAULT_WORDLEN;
+ }
+
+ return ptr;
+}
+
+#ifdef CONFIG_OF_SPI
+struct spi_slave *spi_base_setup_slave_fdt(const void *blob, int busnum,
+ int node)
+{
+ int cs, max_hz, mode = 0;
+
+ cs = fdtdec_get_int(blob, node, "reg", -1);
+ max_hz = fdtdec_get_int(blob, node, "spi-max-frequency", 100000);
+ if (fdtdec_get_bool(blob, node, "spi-cpol"))
+ mode |= SPI_CPOL;
+ if (fdtdec_get_bool(blob, node, "spi-cpha"))
+ mode |= SPI_CPHA;
+ if (fdtdec_get_bool(blob, node, "spi-cs-high"))
+ mode |= SPI_CS_HIGH;
+ return spi_setup_slave(busnum, cs, max_hz, mode);
+}
+#endif