ASR_BASE
Change-Id: Icf3719cc0afe3eeb3edc7fa80a2eb5199ca9dda1
diff --git a/package/devel/valgrind/patches/130-mips_fix_soft_float.patch b/package/devel/valgrind/patches/130-mips_fix_soft_float.patch
new file mode 100644
index 0000000..f861646
--- /dev/null
+++ b/package/devel/valgrind/patches/130-mips_fix_soft_float.patch
@@ -0,0 +1,68 @@
+Disable the valgrind helpers which use MIPS floating point operations
+when floating point support is deactivated in the toolchain.
+
+The fix from this commit is not sufficient any more:
+https://sourceware.org/git/?p=valgrind.git;a=commitdiff;h=869fcf2f6739f17b4eff36ec68f8dca826c8afeb
+
+This fixes the following error message when compiling with a GCC 10 MIPS BE 32:
+---------------------------------------------------------
+../VEX/priv/guest_mips_helpers.c: In function 'mips_dirtyhelper_calculate_FCSR_fp32':
+../VEX/priv/guest_mips_helpers.c:640:10: error: the register '$f21' cannot be clobbered in 'asm' for the current target
+ 640 | ASM_VOLATILE_UNARY32_DOUBLE(round.w.d)
+ | ^
+---------------------------------------------------------
+
+--- a/VEX/priv/guest_mips_helpers.c
++++ b/VEX/priv/guest_mips_helpers.c
+@@ -620,6 +620,7 @@ extern UInt mips_dirtyhelper_calculate_F
+ flt_op inst )
+ {
+ UInt ret = 0;
++#ifndef __mips_soft_float
+ #if defined(__mips__)
+ VexGuestMIPS32State* guest_state = (VexGuestMIPS32State*)gs;
+ UInt loFsVal, hiFsVal, loFtVal, hiFtVal;
+@@ -702,6 +703,7 @@ extern UInt mips_dirtyhelper_calculate_F
+ break;
+ }
+ #endif
++#endif
+ return ret;
+ }
+
+@@ -711,6 +713,7 @@ extern UInt mips_dirtyhelper_calculate_F
+ flt_op inst )
+ {
+ UInt ret = 0;
++#ifndef __mips_soft_float
+ #if defined(__mips__) && ((__mips == 64) || \
+ (defined(__mips_isa_rev) && (__mips_isa_rev >= 2)))
+ #if defined(VGA_mips32)
+@@ -863,6 +866,7 @@ extern UInt mips_dirtyhelper_calculate_F
+ break;
+ }
+ #endif
++#endif
+ return ret;
+ }
+
+--- a/coregrind/m_machine.c
++++ b/coregrind/m_machine.c
+@@ -2119,6 +2119,7 @@ Bool VG_(machine_get_hwcaps)( void )
+ we are using alternative way to determine FP mode */
+ ULong result = 0;
+
++#ifndef __mips_soft_float
+ if (!VG_MINIMAL_SETJMP(env_unsup_insn)) {
+ __asm__ volatile (
+ ".set push\n\t"
+@@ -2136,6 +2137,9 @@ Bool VG_(machine_get_hwcaps)( void )
+
+ fpmode = (result != 0x3FF0000000000000ull);
+ }
++#else
++ fpmode = 0;
++#endif
+ }
+
+ if (fpmode != 0)