ASR_BASE
Change-Id: Icf3719cc0afe3eeb3edc7fa80a2eb5199ca9dda1
diff --git a/package/libs/libunwind/patches/002-fix-building-getcontext_S.patch b/package/libs/libunwind/patches/002-fix-building-getcontext_S.patch
new file mode 100644
index 0000000..d88594e
--- /dev/null
+++ b/package/libs/libunwind/patches/002-fix-building-getcontext_S.patch
@@ -0,0 +1,17 @@
+--- a/src/mips/getcontext.S
++++ b/src/mips/getcontext.S
+@@ -24,12 +24,12 @@ OF CONTRACT, TORT OR OTHERWISE, ARISING
+ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */
+
+ #include "offsets.h"
+-#include <endian.h>
+
+ .text
++ .set nomips16
+
+ #if _MIPS_SIM == _ABIO32
+-# if __BYTE_ORDER == __BIG_ENDIAN
++# if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+ # define OFFSET 4
+ # else
+ # define OFFSET 0
diff --git a/package/libs/libunwind/patches/003-fix-missing-ef_reg-defs-with-musl.patch b/package/libs/libunwind/patches/003-fix-missing-ef_reg-defs-with-musl.patch
new file mode 100644
index 0000000..c68e4b9
--- /dev/null
+++ b/package/libs/libunwind/patches/003-fix-missing-ef_reg-defs-with-musl.patch
@@ -0,0 +1,45 @@
+--- a/include/libunwind-mips.h
++++ b/include/libunwind-mips.h
+@@ -121,6 +121,42 @@ typedef enum
+ }
+ mips_regnum_t;
+
++#ifndef __GLIBC__
++#include <sys/reg.h>
++
++/* musl as of 1.1.14 does not export these */
++#define EF_REG0 6
++#define EF_REG1 7
++#define EF_REG2 8
++#define EF_REG3 9
++#define EF_REG4 10
++#define EF_REG5 11
++#define EF_REG6 12
++#define EF_REG7 13
++#define EF_REG8 14
++#define EF_REG9 15
++#define EF_REG10 16
++#define EF_REG11 17
++#define EF_REG12 18
++#define EF_REG13 19
++#define EF_REG14 20
++#define EF_REG15 21
++#define EF_REG16 22
++#define EF_REG17 23
++#define EF_REG18 24
++#define EF_REG19 25
++#define EF_REG20 26
++#define EF_REG21 27
++#define EF_REG22 28
++#define EF_REG23 29
++#define EF_REG24 30
++#define EF_REG25 31
++#define EF_REG28 34
++#define EF_REG29 35
++#define EF_REG30 36
++#define EF_REG31 37
++#endif
++
+ typedef enum
+ {
+ UNW_MIPS_ABI_O32,
diff --git a/package/libs/libunwind/patches/004-ppc-musl.patch b/package/libs/libunwind/patches/004-ppc-musl.patch
new file mode 100644
index 0000000..5ea79e1
--- /dev/null
+++ b/package/libs/libunwind/patches/004-ppc-musl.patch
@@ -0,0 +1,235 @@
+--- a/include/libunwind-ppc32.h
++++ b/include/libunwind-ppc32.h
+@@ -81,6 +81,88 @@ typedef int64_t unw_sword_t;
+
+ typedef long double unw_tdep_fpreg_t;
+
++#ifndef __GLIBC__
++
++/* We can't include asm/ptrace.h here, as it conflicts with musl's definitions */
++
++#define PT_R0 0
++#define PT_R1 1
++#define PT_R2 2
++#define PT_R3 3
++#define PT_R4 4
++#define PT_R5 5
++#define PT_R6 6
++#define PT_R7 7
++#define PT_R8 8
++#define PT_R9 9
++#define PT_R10 10
++#define PT_R11 11
++#define PT_R12 12
++#define PT_R13 13
++#define PT_R14 14
++#define PT_R15 15
++#define PT_R16 16
++#define PT_R17 17
++#define PT_R18 18
++#define PT_R19 19
++#define PT_R20 20
++#define PT_R21 21
++#define PT_R22 22
++#define PT_R23 23
++#define PT_R24 24
++#define PT_R25 25
++#define PT_R26 26
++#define PT_R27 27
++#define PT_R28 28
++#define PT_R29 29
++#define PT_R30 30
++#define PT_R31 31
++
++#define PT_NIP 32
++#define PT_MSR 33
++#define PT_ORIG_R3 34
++#define PT_CTR 35
++#define PT_LNK 36
++#define PT_XER 37
++#define PT_CCR 38
++#ifndef __powerpc64__
++#define PT_MQ 39
++#else
++#define PT_SOFTE 39
++#endif
++#define PT_TRAP 40
++#define PT_DAR 41
++#define PT_DSISR 42
++#define PT_RESULT 43
++#define PT_DSCR 44
++#define PT_REGS_COUNT 44
++
++#define PT_FPR0 48 /* each FP reg occupies 2 slots in this space */
++
++#ifndef __powerpc64__
++
++#define PT_FPR31 (PT_FPR0 + 2*31)
++#define PT_FPSCR (PT_FPR0 + 2*32 + 1)
++
++#else /* __powerpc64__ */
++
++#define PT_FPSCR (PT_FPR0 + 32) /* each FP reg occupies 1 slot in 64-bit space */
++
++
++#define PT_VR0 82 /* each Vector reg occupies 2 slots in 64-bit */
++#define PT_VSCR (PT_VR0 + 32*2 + 1)
++#define PT_VRSAVE (PT_VR0 + 33*2)
++
++
++/*
++ * Only store first 32 VSRs here. The second 32 VSRs in VR0-31
++ */
++#define PT_VSR0 150 /* each VSR reg occupies 2 slots in 64-bit */
++#define PT_VSR31 (PT_VSR0 + 2*31)
++#endif /* __powerpc64__ */
++
++#endif /* !__GLIBC__ */
++
+ typedef enum
+ {
+ UNW_PPC32_R0,
+--- a/include/libunwind-ppc64.h
++++ b/include/libunwind-ppc64.h
+@@ -88,6 +88,88 @@ typedef struct {
+ uint64_t halves[2];
+ } unw_tdep_vreg_t;
+
++#ifndef __GLIBC__
++
++/* We can't include asm/ptrace.h here, as it conflicts with musl's definitions */
++
++#define PT_R0 0
++#define PT_R1 1
++#define PT_R2 2
++#define PT_R3 3
++#define PT_R4 4
++#define PT_R5 5
++#define PT_R6 6
++#define PT_R7 7
++#define PT_R8 8
++#define PT_R9 9
++#define PT_R10 10
++#define PT_R11 11
++#define PT_R12 12
++#define PT_R13 13
++#define PT_R14 14
++#define PT_R15 15
++#define PT_R16 16
++#define PT_R17 17
++#define PT_R18 18
++#define PT_R19 19
++#define PT_R20 20
++#define PT_R21 21
++#define PT_R22 22
++#define PT_R23 23
++#define PT_R24 24
++#define PT_R25 25
++#define PT_R26 26
++#define PT_R27 27
++#define PT_R28 28
++#define PT_R29 29
++#define PT_R30 30
++#define PT_R31 31
++
++#define PT_NIP 32
++#define PT_MSR 33
++#define PT_ORIG_R3 34
++#define PT_CTR 35
++#define PT_LNK 36
++#define PT_XER 37
++#define PT_CCR 38
++#ifndef __powerpc64__
++#define PT_MQ 39
++#else
++#define PT_SOFTE 39
++#endif
++#define PT_TRAP 40
++#define PT_DAR 41
++#define PT_DSISR 42
++#define PT_RESULT 43
++#define PT_DSCR 44
++#define PT_REGS_COUNT 44
++
++#define PT_FPR0 48 /* each FP reg occupies 2 slots in this space */
++
++#ifndef __powerpc64__
++
++#define PT_FPR31 (PT_FPR0 + 2*31)
++#define PT_FPSCR (PT_FPR0 + 2*32 + 1)
++
++#else /* __powerpc64__ */
++
++#define PT_FPSCR (PT_FPR0 + 32) /* each FP reg occupies 1 slot in 64-bit space */
++
++
++#define PT_VR0 82 /* each Vector reg occupies 2 slots in 64-bit */
++#define PT_VSCR (PT_VR0 + 32*2 + 1)
++#define PT_VRSAVE (PT_VR0 + 33*2)
++
++
++/*
++ * Only store first 32 VSRs here. The second 32 VSRs in VR0-31
++ */
++#define PT_VSR0 150 /* each VSR reg occupies 2 slots in 64-bit */
++#define PT_VSR31 (PT_VSR0 + 2*31)
++#endif /* __powerpc64__ */
++
++#endif /* !__GLIBC__ */
++
+ typedef enum
+ {
+ UNW_PPC64_R0,
+--- a/src/ppc32/Ginit.c
++++ b/src/ppc32/Ginit.c
+@@ -46,10 +46,15 @@ static void *
+ uc_addr (ucontext_t *uc, int reg)
+ {
+ void *addr;
++#ifdef __GLIBC__
++ mcontext_t *mc = uc->uc_mcontext.uc_regs;
++#else
++ mcontext_t *mc = &uc->uc_mcontext;
++#endif
+
+ if ((unsigned) (reg - UNW_PPC32_R0) < 32)
+ #if defined(__linux__)
+- addr = &uc->uc_mcontext.uc_regs->gregs[reg - UNW_PPC32_R0];
++ addr = &mc->gregs[reg - UNW_PPC32_R0];
+ #elif defined(__FreeBSD__)
+ addr = &uc->uc_mcontext.mc_gpr[reg - UNW_PPC32_R0];
+ #endif
+@@ -58,7 +63,7 @@ uc_addr (ucontext_t *uc, int reg)
+ if ( ((unsigned) (reg - UNW_PPC32_F0) < 32) &&
+ ((unsigned) (reg - UNW_PPC32_F0) >= 0) )
+ #if defined(__linux__)
+- addr = &uc->uc_mcontext.uc_regs->fpregs.fpregs[reg - UNW_PPC32_F0];
++ addr = &mc->fpregs.fpregs[reg - UNW_PPC32_F0];
+ #elif defined(__FreeBSD__)
+ addr = &uc->uc_mcontext.mc_fpreg[reg - UNW_PPC32_F0];
+ #endif
+@@ -85,7 +90,7 @@ uc_addr (ucontext_t *uc, int reg)
+ return NULL;
+ }
+ #if defined(__linux__)
+- addr = &uc->uc_mcontext.uc_regs->gregs[gregs_idx];
++ addr = &mc->gregs[gregs_idx];
+ #elif defined(__FreeBSD__)
+ addr = &uc->uc_mcontext.mc_gpr[gregs_idx];
+ #endif
+--- a/src/ppc32/ucontext_i.h
++++ b/src/ppc32/ucontext_i.h
+@@ -44,8 +44,13 @@ WITH THE SOFTWARE OR THE USE OR OTHER DE
+ //#define MQ_IDX 36
+ #define LINK_IDX 36
+
++#ifdef __GLIBC__
+ #define _UC_MCONTEXT_GPR(x) ( ((void *)&dmy_ctxt.uc_mcontext.uc_regs->gregs[x] - (void *)&dmy_ctxt) )
+ #define _UC_MCONTEXT_FPR(x) ( ((void *)&dmy_ctxt.uc_mcontext.uc_regs->fpregs.fpregs[x] - (void *)&dmy_ctxt) )
++#else
++#define _UC_MCONTEXT_GPR(x) ( ((void *)&dmy_ctxt.uc_mcontext.gregs[x] - (void *)&dmy_ctxt) )
++#define _UC_MCONTEXT_FPR(x) ( ((void *)&dmy_ctxt.uc_mcontext.fpregs.fpregs[x] - (void *)&dmy_ctxt) )
++#endif
+
+ /* These are dummy structures used only for obtaining the offsets of the
+ various structure members. */
diff --git a/package/libs/libunwind/patches/005-loongarch64-musl.pattch b/package/libs/libunwind/patches/005-loongarch64-musl.pattch
new file mode 100644
index 0000000..bb961bd
--- /dev/null
+++ b/package/libs/libunwind/patches/005-loongarch64-musl.pattch
@@ -0,0 +1,12 @@
+--- a/src/loongarch64/getcontext.S
++++ b/src/loongarch64/getcontext.S
+@@ -25,7 +25,9 @@ OF CONTRACT, TORT OR OTHERWISE, ARISING
+ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */
+
+ #include "offsets.h"
++#ifdef __GLIBC__
+ #include <endian.h>
++#endif
+ .text
+
+ #define SREG(X) st.d $r##X, $r4, (LINUX_UC_MCONTEXT_GREGS + 8 * X)