ASR_BASE
Change-Id: Icf3719cc0afe3eeb3edc7fa80a2eb5199ca9dda1
diff --git a/target/linux/bcm4908/patches-5.4/074-v5.13-0002-dt-bindings-net-bcm4908-enet-add-optional-TX-interru.patch b/target/linux/bcm4908/patches-5.4/074-v5.13-0002-dt-bindings-net-bcm4908-enet-add-optional-TX-interru.patch
new file mode 100644
index 0000000..b61437a
--- /dev/null
+++ b/target/linux/bcm4908/patches-5.4/074-v5.13-0002-dt-bindings-net-bcm4908-enet-add-optional-TX-interru.patch
@@ -0,0 +1,50 @@
+From ab4dda7a8cb7e55ea3d92fd5e249cf6f5396028c Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
+Date: Thu, 11 Mar 2021 13:35:20 +0100
+Subject: [PATCH] dt-bindings: net: bcm4908-enet: add optional TX interrupt
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+I discovered that hardware actually supports two interrupts, one per DMA
+channel (RX and TX).
+
+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+---
+ .../bindings/net/brcm,bcm4908-enet.yaml | 17 +++++++++++++----
+ 1 file changed, 13 insertions(+), 4 deletions(-)
+
+--- a/Documentation/devicetree/bindings/net/brcm,bcm4908-enet.yaml
++++ b/Documentation/devicetree/bindings/net/brcm,bcm4908-enet.yaml
+@@ -22,10 +22,18 @@ properties:
+ maxItems: 1
+
+ interrupts:
+- description: RX interrupt
++ minItems: 1
++ maxItems: 2
++ items:
++ - description: RX interrupt
++ - description: TX interrupt
+
+ interrupt-names:
+- const: rx
++ minItems: 1
++ maxItems: 2
++ items:
++ - const: rx
++ - const: tx
+
+ required:
+ - reg
+@@ -43,6 +51,7 @@ examples:
+ compatible = "brcm,bcm4908-enet";
+ reg = <0x80002000 0x1000>;
+
+- interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
+- interrupt-names = "rx";
++ interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
++ interrupt-names = "rx", "tx";
+ };