ASR_BASE

Change-Id: Icf3719cc0afe3eeb3edc7fa80a2eb5199ca9dda1
diff --git a/target/linux/bcm63xx/patches-5.4/389-MIPS-BCM63XX-add-clkdev-lookups-for-device-tree.patch b/target/linux/bcm63xx/patches-5.4/389-MIPS-BCM63XX-add-clkdev-lookups-for-device-tree.patch
new file mode 100644
index 0000000..b5085ea
--- /dev/null
+++ b/target/linux/bcm63xx/patches-5.4/389-MIPS-BCM63XX-add-clkdev-lookups-for-device-tree.patch
@@ -0,0 +1,105 @@
+From cad8f63047c0691e8185d3c9c6a2705b83310c9c Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Mon, 31 Jul 2017 20:10:36 +0200
+Subject: [PATCH] MIPS: BCM63XX: add clkdev lookups for device tree
+
+---
+ arch/mips/bcm63xx/clk.c | 15 +++++++++++++++
+ 1 file changed, 15 insertions(+)
+
+--- a/arch/mips/bcm63xx/clk.c
++++ b/arch/mips/bcm63xx/clk.c
+@@ -503,6 +503,8 @@ static struct clk_lookup bcm3368_clks[]
+ 	CLKDEV_INIT(NULL, "periph", &clk_periph),
+ 	CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
+ 	CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
++	CLKDEV_INIT("fff8c100.serial", "refclk", &clk_periph),
++	CLKDEV_INIT("fff8c120.serial", "refclk", &clk_periph),
+ 	/* gated clocks */
+ 	CLKDEV_INIT(NULL, "enet0", &clk_enet0),
+ 	CLKDEV_INIT(NULL, "enet1", &clk_enet1),
+@@ -519,7 +521,9 @@ static struct clk_lookup bcm6318_clks[]
+ 	/* fixed rate clocks */
+ 	CLKDEV_INIT(NULL, "periph", &clk_periph),
+ 	CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
++	CLKDEV_INIT("10000100.serial", "refclk", &clk_periph),
+ 	CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
++	CLKDEV_INIT("10003000.spi", "pll", &clk_hsspi_pll),
+ 	/* gated clocks */
+ 	CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
+ 	CLKDEV_INIT(NULL, "usbh", &clk_usbh),
+@@ -533,7 +537,10 @@ static struct clk_lookup bcm6328_clks[]
+ 	CLKDEV_INIT(NULL, "periph", &clk_periph),
+ 	CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
+ 	CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
++	CLKDEV_INIT("10000100.serial", "refclk", &clk_periph),
++	CLKDEV_INIT("10000120.serial", "refclk", &clk_periph),
+ 	CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
++	CLKDEV_INIT("10001000.spi", "pll", &clk_hsspi_pll),
+ 	/* gated clocks */
+ 	CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
+ 	CLKDEV_INIT(NULL, "usbh", &clk_usbh),
+@@ -546,6 +553,7 @@ static struct clk_lookup bcm6338_clks[]
+ 	/* fixed rate clocks */
+ 	CLKDEV_INIT(NULL, "periph", &clk_periph),
+ 	CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
++	CLKDEV_INIT("fffe0300.serial", "refclk", &clk_periph),
+ 	/* gated clocks */
+ 	CLKDEV_INIT(NULL, "enet0", &clk_enet0),
+ 	CLKDEV_INIT(NULL, "enet1", &clk_enet1),
+@@ -560,6 +568,7 @@ static struct clk_lookup bcm6345_clks[]
+ 	/* fixed rate clocks */
+ 	CLKDEV_INIT(NULL, "periph", &clk_periph),
+ 	CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
++	CLKDEV_INIT("fffe0300.serial", "refclk", &clk_periph),
+ 	/* gated clocks */
+ 	CLKDEV_INIT(NULL, "enet0", &clk_enet0),
+ 	CLKDEV_INIT(NULL, "enet1", &clk_enet1),
+@@ -574,6 +583,7 @@ static struct clk_lookup bcm6348_clks[]
+ 	/* fixed rate clocks */
+ 	CLKDEV_INIT(NULL, "periph", &clk_periph),
+ 	CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
++	CLKDEV_INIT("fffe0300.serial", "refclk", &clk_periph),
+ 	/* gated clocks */
+ 	CLKDEV_INIT(NULL, "enet0", &clk_enet0),
+ 	CLKDEV_INIT(NULL, "enet1", &clk_enet1),
+@@ -590,6 +600,8 @@ static struct clk_lookup bcm6358_clks[]
+ 	CLKDEV_INIT(NULL, "periph", &clk_periph),
+ 	CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
+ 	CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
++	CLKDEV_INIT("fffe0100.serial", "refclk", &clk_periph),
++	CLKDEV_INIT("fffe0120.serial", "refclk", &clk_periph),
+ 	/* gated clocks */
+ 	CLKDEV_INIT(NULL, "enet0", &clk_enet0),
+ 	CLKDEV_INIT(NULL, "enet1", &clk_enet1),
+@@ -609,7 +621,10 @@ static struct clk_lookup bcm6362_clks[]
+ 	CLKDEV_INIT(NULL, "periph", &clk_periph),
+ 	CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
+ 	CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
++	CLKDEV_INIT("10000100.serial", "refclk", &clk_periph),
++	CLKDEV_INIT("10000120.serial", "refclk", &clk_periph),
+ 	CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
++	CLKDEV_INIT("10001000.spi", "pll", &clk_hsspi_pll),
+ 	/* gated clocks */
+ 	CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
+ 	CLKDEV_INIT(NULL, "usbh", &clk_usbh),
+@@ -625,6 +640,8 @@ static struct clk_lookup bcm6368_clks[]
+ 	CLKDEV_INIT(NULL, "periph", &clk_periph),
+ 	CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
+ 	CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
++	CLKDEV_INIT("10000100.serial", "refclk", &clk_periph),
++	CLKDEV_INIT("10000120.serial", "refclk", &clk_periph),
+ 	/* gated clocks */
+ 	CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
+ 	CLKDEV_INIT(NULL, "usbh", &clk_usbh),
+@@ -639,7 +656,10 @@ static struct clk_lookup bcm63268_clks[]
+ 	CLKDEV_INIT(NULL, "periph", &clk_periph),
+ 	CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
+ 	CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
++	CLKDEV_INIT("10000180.serial", "refclk", &clk_periph),
++	CLKDEV_INIT("100001a0.serial", "refclk", &clk_periph),
+ 	CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
++	CLKDEV_INIT("10001000.spi", "pll", &clk_hsspi_pll),
+ 	/* gated clocks */
+ 	CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
+ 	CLKDEV_INIT(NULL, "usbh", &clk_usbh),