ASR_BASE
Change-Id: Icf3719cc0afe3eeb3edc7fa80a2eb5199ca9dda1
diff --git a/target/linux/layerscape/patches-5.4/302-dts-0051-arm64-dts-fsl-layerscape-fix-warnings-when-compiling.patch b/target/linux/layerscape/patches-5.4/302-dts-0051-arm64-dts-fsl-layerscape-fix-warnings-when-compiling.patch
new file mode 100644
index 0000000..7ac2f31
--- /dev/null
+++ b/target/linux/layerscape/patches-5.4/302-dts-0051-arm64-dts-fsl-layerscape-fix-warnings-when-compiling.patch
@@ -0,0 +1,292 @@
+From d949248dccef18f7257d8de0adfd67244955e7b7 Mon Sep 17 00:00:00 2001
+From: Pankaj Bansal <pankaj.bansal@nxp.com>
+Date: Mon, 22 Apr 2019 16:22:49 +0530
+Subject: [PATCH] arm64: dts: fsl: layerscape: fix warnings when compiling dts
+ files
+
+when compiling dts file using DTC_FLAG='-@', the device tree compiler
+reports these warnings:
+
+Warning (simple_bus_reg): /soc/mdio@0x8c0b000: simple-bus unit address
+format error, expected "8c0b000"
+Warning (unit_address_format): /pfe@04000000: unit name should not have
+leading 0s
+
+Fixed the node names to silence these warnings.
+
+Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
+---
+ arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 3 ++-
+ arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 14 +++++++-------
+ arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi | 22 +++++++++++-----------
+ arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 18 +++++++++---------
+ 4 files changed, 29 insertions(+), 28 deletions(-)
+
+--- a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
++++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
+@@ -3,6 +3,7 @@
+ * Device Tree Include file for Freescale Layerscape-1012A family SoC.
+ *
+ * Copyright 2016 Freescale Semiconductor, Inc.
++ * Copyright 2019 NXP
+ *
+ */
+
+@@ -514,7 +515,7 @@
+ };
+ };
+
+- pfe: pfe@04000000 {
++ pfe: pfe@4000000 {
+ compatible = "fsl,pfe";
+ reg = <0x0 0x04000000 0x0 0xc00000>, /* AXI 16M */
+ <0x0 0x83400000 0x0 0xc00000>; /* PFE DDR 12M */
+--- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
++++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
+@@ -2,7 +2,7 @@
+ /*
+ * Device Tree Include file for NXP Layerscape-1088A family SoC.
+ *
+- * Copyright 2017 NXP
++ * Copyright 2017-2019 NXP
+ *
+ * Harninder Rai <harninder.rai@nxp.com>
+ *
+@@ -310,7 +310,7 @@
+ };
+
+ /* TODO: WRIOP (CCSR?) */
+- emdio1: mdio@0x8B96000 { /* WRIOP0: 0x8B8_0000,
++ emdio1: mdio@8B96000 { /* WRIOP0: 0x8B8_0000,
+ * E-MDIO1: 0x1_6000
+ */
+ compatible = "fsl,fman-memac-mdio";
+@@ -323,7 +323,7 @@
+ #size-cells = <0>;
+ };
+
+- emdio2: mdio@0x8B97000 { /* WRIOP0: 0x8B8_0000,
++ emdio2: mdio@8B97000 { /* WRIOP0: 0x8B8_0000,
+ * E-MDIO2: 0x1_7000
+ */
+ compatible = "fsl,fman-memac-mdio";
+@@ -335,7 +335,7 @@
+ #size-cells = <0>;
+ };
+
+- pcs_mdio1: mdio@0x8c07000 {
++ pcs_mdio1: mdio@8c07000 {
+ compatible = "fsl,fman-memac-mdio";
+ reg = <0x0 0x8c07000 0x0 0x1000>;
+ device_type = "mdio";
+@@ -345,7 +345,7 @@
+ #size-cells = <0>;
+ };
+
+- pcs_mdio2: mdio@0x8c0b000 {
++ pcs_mdio2: mdio@8c0b000 {
+ compatible = "fsl,fman-memac-mdio";
+ reg = <0x0 0x8c0b000 0x0 0x1000>;
+ device_type = "mdio";
+@@ -355,7 +355,7 @@
+ #size-cells = <0>;
+ };
+
+- pcs_mdio3: mdio@0x8c0f000 {
++ pcs_mdio3: mdio@8c0f000 {
+ compatible = "fsl,fman-memac-mdio";
+ reg = <0x0 0x8c0f000 0x0 0x1000>;
+ device_type = "mdio";
+@@ -365,7 +365,7 @@
+ #size-cells = <0>;
+ };
+
+- pcs_mdio4: mdio@0x8c13000 {
++ pcs_mdio4: mdio@8c13000 {
+ compatible = "fsl,fman-memac-mdio";
+ reg = <0x0 0x8c13000 0x0 0x1000>;
+ device_type = "mdio";
+--- a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
++++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
+@@ -3,7 +3,7 @@
+ * Device Tree Include file for Freescale Layerscape-2080A family SoC.
+ *
+ * Copyright 2016 Freescale Semiconductor, Inc.
+- * Copyright 2017 NXP
++ * Copyright 2017-2019 NXP
+ *
+ * Abhimanyu Saini <abhimanyu.saini@nxp.com>
+ *
+@@ -524,7 +524,7 @@
+ };
+
+ /* TODO: WRIOP (CCSR?) */
+- emdio1: mdio@0x8B96000 { /* WRIOP0: 0x8B8_0000,
++ emdio1: mdio@8B96000 { /* WRIOP0: 0x8B8_0000,
+ * E-MDIO1: 0x1_6000
+ */
+ compatible = "fsl,fman-memac-mdio";
+@@ -537,7 +537,7 @@
+ #size-cells = <0>;
+ };
+
+- emdio2: mdio@0x8B97000 { /* WRIOP0: 0x8B8_0000,
++ emdio2: mdio@8B97000 { /* WRIOP0: 0x8B8_0000,
+ * E-MDIO2: 0x1_7000
+ */
+ compatible = "fsl,fman-memac-mdio";
+@@ -549,7 +549,7 @@
+ #size-cells = <0>;
+ };
+
+- pcs_mdio1: mdio@0x8c07000 {
++ pcs_mdio1: mdio@8c07000 {
+ compatible = "fsl,fman-memac-mdio";
+ reg = <0x0 0x8c07000 0x0 0x1000>;
+ device_type = "mdio";
+@@ -559,7 +559,7 @@
+ #size-cells = <0>;
+ };
+
+- pcs_mdio2: mdio@0x8c0b000 {
++ pcs_mdio2: mdio@8c0b000 {
+ compatible = "fsl,fman-memac-mdio";
+ reg = <0x0 0x8c0b000 0x0 0x1000>;
+ device_type = "mdio";
+@@ -569,7 +569,7 @@
+ #size-cells = <0>;
+ };
+
+- pcs_mdio3: mdio@0x8c0f000 {
++ pcs_mdio3: mdio@8c0f000 {
+ compatible = "fsl,fman-memac-mdio";
+ reg = <0x0 0x8c0f000 0x0 0x1000>;
+ device_type = "mdio";
+@@ -579,7 +579,7 @@
+ #size-cells = <0>;
+ };
+
+- pcs_mdio4: mdio@0x8c13000 {
++ pcs_mdio4: mdio@8c13000 {
+ compatible = "fsl,fman-memac-mdio";
+ reg = <0x0 0x8c13000 0x0 0x1000>;
+ device_type = "mdio";
+@@ -589,7 +589,7 @@
+ #size-cells = <0>;
+ };
+
+- pcs_mdio5: mdio@0x8c17000 {
++ pcs_mdio5: mdio@8c17000 {
+ status = "disabled";
+ compatible = "fsl,fman-memac-mdio";
+ reg = <0x0 0x8c17000 0x0 0x1000>;
+@@ -600,7 +600,7 @@
+ #size-cells = <0>;
+ };
+
+- pcs_mdio6: mdio@0x8c1b000 {
++ pcs_mdio6: mdio@8c1b000 {
+ status = "disabled";
+ compatible = "fsl,fman-memac-mdio";
+ reg = <0x0 0x8c1b000 0x0 0x1000>;
+@@ -611,7 +611,7 @@
+ #size-cells = <0>;
+ };
+
+- pcs_mdio7: mdio@0x8c1f000 {
++ pcs_mdio7: mdio@8c1f000 {
+ status = "disabled";
+ compatible = "fsl,fman-memac-mdio";
+ reg = <0x0 0x8c1f000 0x0 0x1000>;
+@@ -622,7 +622,7 @@
+ #size-cells = <0>;
+ };
+
+- pcs_mdio8: mdio@0x8c23000 {
++ pcs_mdio8: mdio@8c23000 {
+ status = "disabled";
+ compatible = "fsl,fman-memac-mdio";
+ reg = <0x0 0x8c23000 0x0 0x1000>;
+--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
++++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
+@@ -2,7 +2,7 @@
+ //
+ // Device Tree Include file for Layerscape-LX2160A family SoC.
+ //
+-// Copyright 2018 NXP
++// Copyright 2018-2019 NXP
+
+ #include <dt-bindings/gpio/gpio.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+@@ -500,7 +500,7 @@
+ status = "disabled";
+ };
+
+- pcs_mdio1: mdio@0x8c07000 {
++ pcs_mdio1: mdio@8c07000 {
+ compatible = "fsl,fman-memac-mdio";
+ reg = <0x0 0x8c07000 0x0 0x1000>;
+ device_type = "mdio";
+@@ -510,7 +510,7 @@
+ #size-cells = <0>;
+ };
+
+- pcs_mdio2: mdio@0x8c0b000 {
++ pcs_mdio2: mdio@8c0b000 {
+ compatible = "fsl,fman-memac-mdio";
+ reg = <0x0 0x8c0b000 0x0 0x1000>;
+ device_type = "mdio";
+@@ -520,7 +520,7 @@
+ #size-cells = <0>;
+ };
+
+- pcs_mdio3: mdio@0x8c0f000 {
++ pcs_mdio3: mdio@8c0f000 {
+ compatible = "fsl,fman-memac-mdio";
+ reg = <0x0 0x8c0f000 0x0 0x1000>;
+ device_type = "mdio";
+@@ -530,7 +530,7 @@
+ #size-cells = <0>;
+ };
+
+- pcs_mdio4: mdio@0x8c13000 {
++ pcs_mdio4: mdio@8c13000 {
+ compatible = "fsl,fman-memac-mdio";
+ reg = <0x0 0x8c13000 0x0 0x1000>;
+ device_type = "mdio";
+@@ -540,7 +540,7 @@
+ #size-cells = <0>;
+ };
+
+- pcs_mdio5: mdio@0x8c17000 {
++ pcs_mdio5: mdio@8c17000 {
+ compatible = "fsl,fman-memac-mdio";
+ reg = <0x0 0x8c17000 0x0 0x1000>;
+ device_type = "mdio";
+@@ -550,7 +550,7 @@
+ #size-cells = <0>;
+ };
+
+- pcs_mdio6: mdio@0x8c1b000 {
++ pcs_mdio6: mdio@8c1b000 {
+ compatible = "fsl,fman-memac-mdio";
+ reg = <0x0 0x8c1b000 0x0 0x1000>;
+ device_type = "mdio";
+@@ -560,7 +560,7 @@
+ #size-cells = <0>;
+ };
+
+- pcs_mdio7: mdio@0x8c1f000 {
++ pcs_mdio7: mdio@8c1f000 {
+ compatible = "fsl,fman-memac-mdio";
+ reg = <0x0 0x8c1f000 0x0 0x1000>;
+ device_type = "mdio";
+@@ -570,7 +570,7 @@
+ #size-cells = <0>;
+ };
+
+- pcs_mdio8: mdio@0x8c23000 {
++ pcs_mdio8: mdio@8c23000 {
+ compatible = "fsl,fman-memac-mdio";
+ reg = <0x0 0x8c23000 0x0 0x1000>;
+ device_type = "mdio";