ASR_BASE
Change-Id: Icf3719cc0afe3eeb3edc7fa80a2eb5199ca9dda1
diff --git a/target/linux/layerscape/patches-5.4/302-dts-0057-arm64-dts-fsl-lx2160a-add-flexcan-node.patch b/target/linux/layerscape/patches-5.4/302-dts-0057-arm64-dts-fsl-lx2160a-add-flexcan-node.patch
new file mode 100644
index 0000000..c85139f
--- /dev/null
+++ b/target/linux/layerscape/patches-5.4/302-dts-0057-arm64-dts-fsl-lx2160a-add-flexcan-node.patch
@@ -0,0 +1,103 @@
+From c2046901f933b0e1c87c5cbdab4ba27a3b66317e Mon Sep 17 00:00:00 2001
+From: Pankaj Bansal <pankaj.bansal@nxp.com>
+Date: Wed, 8 May 2019 17:49:14 +0530
+Subject: [PATCH] arm64: dts: fsl: lx2160a: add flexcan node
+
+Add flexcan node in LX2160A SOC file as well as in QDS and RDB files.
+The device tree bindings used can be referred from
+Documentation/devicetree/bindings/net/can/fsl-flexcan.txt
+
+Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
+---
+ arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts | 10 +++++++++-
+ arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts | 18 +++++++++++++++++-
+ arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 18 ++++++++++++++++++
+ 3 files changed, 44 insertions(+), 2 deletions(-)
+
+--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
++++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
+@@ -2,7 +2,7 @@
+ //
+ // Device Tree file for LX2160AQDS
+ //
+-// Copyright 2018 NXP
++// Copyright 2018-2019 NXP
+
+ /dts-v1/;
+
+@@ -155,6 +155,14 @@
+ };
+ };
+
++&can0 {
++ status = "okay";
++};
++
++&can1 {
++ status = "okay";
++};
++
+ &crypto {
+ status = "okay";
+ };
+--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
++++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
+@@ -2,7 +2,7 @@
+ //
+ // Device Tree file for LX2160ARDB
+ //
+-// Copyright 2018 NXP
++// Copyright 2018-2019 NXP
+
+ /dts-v1/;
+
+@@ -31,6 +31,22 @@
+ };
+ };
+
++&can0 {
++ status = "okay";
++
++ can-transceiver {
++ max-bitrate = <5000000>;
++ };
++};
++
++&can1 {
++ status = "okay";
++
++ can-transceiver {
++ max-bitrate = <5000000>;
++ };
++};
++
+ &crypto {
+ status = "okay";
+ };
+--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
++++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
+@@ -753,6 +753,24 @@
+ status = "disabled";
+ };
+
++ can0: can@2180000 {
++ compatible = "fsl,lx2160ar1-flexcan";
++ reg = <0x0 0x2180000 0x0 0x10000>;
++ interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&sysclk>, <&clockgen 4 7>;
++ clock-names = "ipg", "per";
++ status = "disabled";
++ };
++
++ can1: can@2190000 {
++ compatible = "fsl,lx2160ar1-flexcan";
++ reg = <0x0 0x2190000 0x0 0x10000>;
++ interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&sysclk>, <&clockgen 4 7>;
++ clock-names = "ipg", "per";
++ status = "disabled";
++ };
++
+ uart0: serial@21c0000 {
+ compatible = "arm,sbsa-uart","arm,pl011";
+ reg = <0x0 0x21c0000 0x0 0x1000>;