ASR_BASE
Change-Id: Icf3719cc0afe3eeb3edc7fa80a2eb5199ca9dda1
diff --git a/target/linux/octeontx/patches-5.4/0001-net-thunderx-use-proper-interface-type-for-RGMII.patch b/target/linux/octeontx/patches-5.4/0001-net-thunderx-use-proper-interface-type-for-RGMII.patch
new file mode 100644
index 0000000..6f144b6
--- /dev/null
+++ b/target/linux/octeontx/patches-5.4/0001-net-thunderx-use-proper-interface-type-for-RGMII.patch
@@ -0,0 +1,42 @@
+From 2d3da16317086ba6048c601ee88cdc96f19fd741 Mon Sep 17 00:00:00 2001
+From: Tim Harvey <tharvey@gateworks.com>
+Date: Fri, 7 Feb 2020 12:40:26 -0800
+Subject: [PATCH 01/12] net: thunderx: use proper interface type for RGMII
+
+The configuration of the OCTEONTX XCV_DLL_CTL register via
+xcv_init_hw() is such that the RGMII RX delay is bypassed
+leaving the RGMII TX delay enabled in the MAC:
+
+ /* Configure DLL - enable or bypass
+ * TX no bypass, RX bypass
+ */
+ cfg = readq_relaxed(xcv->reg_base + XCV_DLL_CTL);
+ cfg &= ~0xFF03;
+ cfg |= CLKRX_BYP;
+ writeq_relaxed(cfg, xcv->reg_base + XCV_DLL_CTL);
+
+This would coorespond to a interface type of PHY_INTERFACE_MODE_RGMII_RXID
+and not PHY_INTERFACE_MODE_RGMII.
+
+Fixing this allows RGMII PHY drivers to do the right thing (enable
+RX delay in the PHY) instead of erroneously enabling both delays in the
+PHY.
+
+Signed-off-by: Tim Harvey <tharvey@gateworks.com>
+Reviewed-by: Andrew Lunn <andrew@lunn.ch>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+---
+ drivers/net/ethernet/cavium/thunder/thunder_bgx.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/net/ethernet/cavium/thunder/thunder_bgx.c
++++ b/drivers/net/ethernet/cavium/thunder/thunder_bgx.c
+@@ -1048,7 +1048,7 @@ static int phy_interface_mode(u8 lmac_ty
+ if (lmac_type == BGX_MODE_QSGMII)
+ return PHY_INTERFACE_MODE_QSGMII;
+ if (lmac_type == BGX_MODE_RGMII)
+- return PHY_INTERFACE_MODE_RGMII;
++ return PHY_INTERFACE_MODE_RGMII_RXID;
+
+ return PHY_INTERFACE_MODE_SGMII;
+ }
diff --git a/target/linux/octeontx/patches-5.4/0002-gpio-thunderx-fix-irq_request_resources.patch b/target/linux/octeontx/patches-5.4/0002-gpio-thunderx-fix-irq_request_resources.patch
new file mode 100644
index 0000000..44d91da
--- /dev/null
+++ b/target/linux/octeontx/patches-5.4/0002-gpio-thunderx-fix-irq_request_resources.patch
@@ -0,0 +1,41 @@
+From e8287ec10f21877eb0ac4c1fb4e89e42d8bc10da Mon Sep 17 00:00:00 2001
+From: Tim Harvey <tharvey@gateworks.com>
+Date: Wed, 11 Mar 2020 08:19:45 -0700
+Subject: [PATCH 2/7] gpio: thunderx: fix irq_request_resources
+
+If there are no parent resources do not call irq_chip_request_resources_parent
+at all as this will return an error.
+
+This resolves a regression where devices using a thunderx gpio as an interrupt
+would fail probing.
+
+Fixes: 0d04d0c ("gpio: thunderx: Use the default parent apis for {request,release}_resources")
+Signed-off-by: Tim Harvey <tharvey@gateworks.com>
+---
+ drivers/gpio/gpio-thunderx.c | 9 ++++++---
+ 1 file changed, 6 insertions(+), 3 deletions(-)
+
+--- a/drivers/gpio/gpio-thunderx.c
++++ b/drivers/gpio/gpio-thunderx.c
+@@ -363,15 +363,18 @@ static int thunderx_gpio_irq_request_res
+ {
+ struct thunderx_line *txline = irq_data_get_irq_chip_data(data);
+ struct thunderx_gpio *txgpio = txline->txgpio;
++ struct irq_data *parent_data = data->parent_data;
+ int r;
+
+ r = gpiochip_lock_as_irq(&txgpio->chip, txline->line);
+ if (r)
+ return r;
+
+- r = irq_chip_request_resources_parent(data);
+- if (r)
+- gpiochip_unlock_as_irq(&txgpio->chip, txline->line);
++ if (parent_data && parent_data->chip->irq_request_resources) {
++ r = irq_chip_request_resources_parent(data);
++ if (r)
++ gpiochip_unlock_as_irq(&txgpio->chip, txline->line);
++ }
+
+ return r;
+ }
diff --git a/target/linux/octeontx/patches-5.4/0003-can-mcp251x-convert-to-half-duplex-SPI.patch b/target/linux/octeontx/patches-5.4/0003-can-mcp251x-convert-to-half-duplex-SPI.patch
new file mode 100644
index 0000000..f760b2a
--- /dev/null
+++ b/target/linux/octeontx/patches-5.4/0003-can-mcp251x-convert-to-half-duplex-SPI.patch
@@ -0,0 +1,57 @@
+From 097cc81ee5c15913ad330baffff2e3dea09bdad0 Mon Sep 17 00:00:00 2001
+From: Tim Harvey <tharvey@gateworks.com>
+Date: Thu, 30 Aug 2018 15:16:08 -0700
+Subject: [PATCH] can: mcp251x: convert driver to half-duplex SPI
+
+Some SPI host controllers such as the Cavium Thunder TX do not support
+full-duplex SPI. Using half-duplex transfers allows the driver to work
+with those host controllers.
+
+Signed-off-by: Tim Harvey <tharvey@gateworks.com>
+---
+ drivers/net/can/spi/mcp251x.c | 15 ++++++++-------
+ 1 file changed, 8 insertions(+), 7 deletions(-)
+
+--- a/drivers/net/can/spi/mcp251x.c
++++ b/drivers/net/can/spi/mcp251x.c
+@@ -291,23 +291,23 @@ static u8 mcp251x_read_reg(struct spi_de
+ priv->spi_tx_buf[0] = INSTRUCTION_READ;
+ priv->spi_tx_buf[1] = reg;
+
+- mcp251x_spi_trans(spi, 3);
+- val = priv->spi_rx_buf[2];
++ spi_write_then_read(spi, priv->spi_tx_buf, 2, &val, 1);
+
+ return val;
+ }
+
+ static void mcp251x_read_2regs(struct spi_device *spi, u8 reg, u8 *v1, u8 *v2)
+ {
++ u8 val[4] = {0};
+ struct mcp251x_priv *priv = spi_get_drvdata(spi);
+
+ priv->spi_tx_buf[0] = INSTRUCTION_READ;
+ priv->spi_tx_buf[1] = reg;
+
+- mcp251x_spi_trans(spi, 4);
++ spi_write_then_read(spi, priv->spi_tx_buf, 2, val, 2);
+
+- *v1 = priv->spi_rx_buf[2];
+- *v2 = priv->spi_rx_buf[3];
++ *v1 = val[0];
++ *v2 = val[1];
+ }
+
+ static void mcp251x_write_reg(struct spi_device *spi, u8 reg, u8 val)
+@@ -398,8 +398,9 @@ static void mcp251x_hw_rx_frame(struct s
+ buf[i] = mcp251x_read_reg(spi, RXBCTRL(buf_idx) + i);
+ } else {
+ priv->spi_tx_buf[RXBCTRL_OFF] = INSTRUCTION_READ_RXB(buf_idx);
+- mcp251x_spi_trans(spi, SPI_TRANSFER_BUF_LEN);
+- memcpy(buf, priv->spi_rx_buf, SPI_TRANSFER_BUF_LEN);
++ spi_write_then_read(spi, priv->spi_tx_buf, 1, priv->spi_rx_buf,
++ SPI_TRANSFER_BUF_LEN);
++ memcpy(buf + 1, priv->spi_rx_buf, SPI_TRANSFER_BUF_LEN - 1);
+ }
+ }
+
diff --git a/target/linux/octeontx/patches-5.4/0004-PCI-add-quirk-for-Gateworks-PLX-PEX860x-switch-with-.patch b/target/linux/octeontx/patches-5.4/0004-PCI-add-quirk-for-Gateworks-PLX-PEX860x-switch-with-.patch
new file mode 100644
index 0000000..3621e37
--- /dev/null
+++ b/target/linux/octeontx/patches-5.4/0004-PCI-add-quirk-for-Gateworks-PLX-PEX860x-switch-with-.patch
@@ -0,0 +1,59 @@
+From d0ff7a1bcfe886cab1a237895b08ac51ecfe10e7 Mon Sep 17 00:00:00 2001
+From: Tim Harvey <tharvey@gateworks.com>
+Date: Wed, 10 Apr 2019 08:00:47 -0700
+Subject: [PATCH 04/12] PCI: add quirk for Gateworks PLX PEX860x switch with
+ GPIO PERST#
+
+Gateworks boards use PLX PEX860x switches where downstream ports
+have their PERST# driven from the PEX GPIO.
+
+Signed-off-by: Tim Harvey <tharvey@gateworks.com>
+---
+ drivers/pci/quirks.c | 32 ++++++++++++++++++++++++++++++++
+ 1 file changed, 32 insertions(+)
+
+--- a/drivers/pci/quirks.c
++++ b/drivers/pci/quirks.c
+@@ -25,6 +25,7 @@
+ #include <linux/ktime.h>
+ #include <linux/mm.h>
+ #include <linux/nvme.h>
++#include <linux/of.h>
+ #include <linux/platform_data/x86/apple.h>
+ #include <linux/pm_runtime.h>
+ #include <linux/suspend.h>
+@@ -5819,3 +5820,34 @@ static void nvidia_ion_ahci_fixup(struct
+ pdev->dev_flags |= PCI_DEV_FLAGS_HAS_MSI_MASKING;
+ }
+ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NVIDIA, 0x0ab8, nvidia_ion_ahci_fixup);
++
++#ifdef CONFIG_PCI_HOST_THUNDER_PEM
++/*
++ * fixup for PLX PEX8909 bridge to configure GPIO1-7 as output High
++ * as they are used for slots1-7 PERST#
++ */
++static void newport_pciesw_early_fixup(struct pci_dev *dev)
++{
++ u32 dw;
++
++ if (!of_machine_is_compatible("gw,newport"))
++ return;
++
++ if (dev->devfn != 0)
++ return;
++
++ dev_info(&dev->dev, "de-asserting PERST#\n");
++ pci_read_config_dword(dev, 0x62c, &dw);
++ dw |= 0xaaa8; /* GPIO1-7 outputs */
++ pci_write_config_dword(dev, 0x62c, dw);
++
++ pci_read_config_dword(dev, 0x644, &dw);
++ dw |= 0xfe; /* GPIO1-7 output high */
++ pci_write_config_dword(dev, 0x644, dw);
++
++ msleep(100);
++}
++DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_PLX, 0x8609, newport_pciesw_early_fixup);
++DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_PLX, 0x8606, newport_pciesw_early_fixup);
++DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_PLX, 0x8604, newport_pciesw_early_fixup);
++#endif /* CONFIG_PCI_HOST_THUNDER_PEM */