ASR_BASE
Change-Id: Icf3719cc0afe3eeb3edc7fa80a2eb5199ca9dda1
diff --git a/target/linux/x86/patches-5.4/011-tune_lzma_options.patch b/target/linux/x86/patches-5.4/011-tune_lzma_options.patch
new file mode 100644
index 0000000..451c5bc
--- /dev/null
+++ b/target/linux/x86/patches-5.4/011-tune_lzma_options.patch
@@ -0,0 +1,22 @@
+--- a/scripts/Makefile.lib
++++ b/scripts/Makefile.lib
+@@ -328,7 +328,7 @@ quiet_cmd_bzip2 = BZIP2 $@
+ # ---------------------------------------------------------------------------
+
+ quiet_cmd_lzma = LZMA $@
+- cmd_lzma = { cat $(real-prereqs) | $(LZMA) e -d20 -lc1 -lp2 -pb2 -eos -si -so; $(size_append); } > $@
++ cmd_lzma = { cat $(real-prereqs) | $(LZMA) e -lc8 -eos -si -so; $(size_append); } > $@
+
+ quiet_cmd_lzo = LZO $@
+ cmd_lzo = { cat $(real-prereqs) | $(KLZOP) -9; $(size_append); } > $@
+--- a/arch/x86/include/asm/boot.h
++++ b/arch/x86/include/asm/boot.h
+@@ -24,7 +24,7 @@
+ # error "Invalid value for CONFIG_PHYSICAL_ALIGN"
+ #endif
+
+-#ifdef CONFIG_KERNEL_BZIP2
++#if defined(CONFIG_KERNEL_BZIP2) || defined(CONFIG_KERNEL_LZMA)
+ # define BOOT_HEAP_SIZE 0x400000
+ #else /* !CONFIG_KERNEL_BZIP2 */
+ # define BOOT_HEAP_SIZE 0x10000
diff --git a/target/linux/x86/patches-5.4/012-pcengines-apu2-detect-apuv4-board.patch b/target/linux/x86/patches-5.4/012-pcengines-apu2-detect-apuv4-board.patch
new file mode 100644
index 0000000..f62617f
--- /dev/null
+++ b/target/linux/x86/patches-5.4/012-pcengines-apu2-detect-apuv4-board.patch
@@ -0,0 +1,50 @@
+From 3d00da1de3ea36ba44f4a7ba76c8c8b16f98204b Mon Sep 17 00:00:00 2001
+From: "Enrico Weigelt, metux IT consult" <info@metux.net>
+Date: Thu, 12 Dec 2019 14:27:56 +0100
+Subject: [PATCH] platform/x86: pcengines-apuv2: detect apuv4 board
+
+GPIO stuff on APUv4 seems to be the same as on APUv2, so we just
+need to match on DMI data.
+
+Signed-off-by: Enrico Weigelt, metux IT consult <info@metux.net>
+Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
+---
+ drivers/platform/x86/pcengines-apuv2.c | 27 ++++++++++++++++++++++++++
+ 1 file changed, 27 insertions(+)
+
+--- a/drivers/platform/x86/pcengines-apuv2.c
++++ b/drivers/platform/x86/pcengines-apuv2.c
+@@ -188,6 +188,33 @@ static const struct dmi_system_id apu_gp
+ },
+ .driver_data = (void *)&board_apu2,
+ },
++ /* APU4 w/ legacy bios < 4.0.8 */
++ {
++ .ident = "apu4",
++ .matches = {
++ DMI_MATCH(DMI_SYS_VENDOR, "PC Engines"),
++ DMI_MATCH(DMI_BOARD_NAME, "APU4")
++ },
++ .driver_data = (void *)&board_apu2,
++ },
++ /* APU4 w/ legacy bios >= 4.0.8 */
++ {
++ .ident = "apu4",
++ .matches = {
++ DMI_MATCH(DMI_SYS_VENDOR, "PC Engines"),
++ DMI_MATCH(DMI_BOARD_NAME, "apu4")
++ },
++ .driver_data = (void *)&board_apu2,
++ },
++ /* APU4 w/ mainline bios */
++ {
++ .ident = "apu4",
++ .matches = {
++ DMI_MATCH(DMI_SYS_VENDOR, "PC Engines"),
++ DMI_MATCH(DMI_BOARD_NAME, "PC Engines apu4")
++ },
++ .driver_data = (void *)&board_apu2,
++ },
+ {}
+ };
+
diff --git a/target/linux/x86/patches-5.4/100-fix_cs5535_clockevt.patch b/target/linux/x86/patches-5.4/100-fix_cs5535_clockevt.patch
new file mode 100644
index 0000000..d4de202
--- /dev/null
+++ b/target/linux/x86/patches-5.4/100-fix_cs5535_clockevt.patch
@@ -0,0 +1,13 @@
+--- a/drivers/clocksource/timer-cs5535.c
++++ b/drivers/clocksource/timer-cs5535.c
+@@ -127,7 +127,9 @@ static irqreturn_t mfgpt_tick(int irq, v
+ cs5535_mfgpt_write(cs5535_event_clock, MFGPT_REG_SETUP,
+ MFGPT_SETUP_CNTEN | MFGPT_SETUP_CMP2);
+
+- cs5535_clockevent.event_handler(&cs5535_clockevent);
++ if (cs5535_clockevent.event_handler)
++ cs5535_clockevent.event_handler(&cs5535_clockevent);
++
+ return IRQ_HANDLED;
+ }
+
diff --git a/target/linux/x86/patches-5.4/120-hwrng-geode-fix-accessing-registers.patch b/target/linux/x86/patches-5.4/120-hwrng-geode-fix-accessing-registers.patch
new file mode 100644
index 0000000..4c80150
--- /dev/null
+++ b/target/linux/x86/patches-5.4/120-hwrng-geode-fix-accessing-registers.patch
@@ -0,0 +1,47 @@
+From 859bd2e0c0052967536f3f902716f204d5a978b1 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Fri, 8 Sep 2023 22:48:33 +0200
+Subject: [PATCH] hwrng: geode: fix accessing registers
+
+When the membase and pci_dev pointer were moved to a new struct in priv,
+the actual membase users were left untouched, and they started reading
+out arbitrary memory behind the struct instead of registers. This
+unfortunately turned the RNG into a constant number generator, depending
+on the content of what was at that offset.
+
+To fix this, update geode_rng_data_{read,present}() to also get the
+membase via amd_geode_priv, and properly read from the right addresses
+again.
+
+Fixes: 9f6ec8dc574e ("hwrng: geode - Fix PCI device refcount leak")
+Reported-by: Timur I. Davletshin <timur.davletshin@gmail.com>
+Closes: https://bugzilla.kernel.org/show_bug.cgi?id=217882
+Tested-by: Timur I. Davletshin <timur.davletshin@gmail.com>
+Suggested-by: Jo-Philipp Wich <jo@mein.io>
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ drivers/char/hw_random/geode-rng.c | 6 ++++--
+ 1 file changed, 4 insertions(+), 2 deletions(-)
+
+--- a/drivers/char/hw_random/geode-rng.c
++++ b/drivers/char/hw_random/geode-rng.c
+@@ -58,7 +58,8 @@ struct amd_geode_priv {
+
+ static int geode_rng_data_read(struct hwrng *rng, u32 *data)
+ {
+- void __iomem *mem = (void __iomem *)rng->priv;
++ struct amd_geode_priv *priv = (struct amd_geode_priv *)rng->priv;
++ void __iomem *mem = priv->membase;
+
+ *data = readl(mem + GEODE_RNG_DATA_REG);
+
+@@ -67,7 +68,8 @@ static int geode_rng_data_read(struct hw
+
+ static int geode_rng_data_present(struct hwrng *rng, int wait)
+ {
+- void __iomem *mem = (void __iomem *)rng->priv;
++ struct amd_geode_priv *priv = (struct amd_geode_priv *)rng->priv;
++ void __iomem *mem = priv->membase;
+ int data, i;
+
+ for (i = 0; i < 20; i++) {
diff --git a/target/linux/x86/patches-5.4/200-pcengines-apu2-reboot.patch b/target/linux/x86/patches-5.4/200-pcengines-apu2-reboot.patch
new file mode 100644
index 0000000..4a3f806
--- /dev/null
+++ b/target/linux/x86/patches-5.4/200-pcengines-apu2-reboot.patch
@@ -0,0 +1,19 @@
+--- a/arch/x86/kernel/reboot.c
++++ b/arch/x86/kernel/reboot.c
+@@ -479,6 +479,16 @@ static const struct dmi_system_id reboot
+ },
+ },
+
++ /* PC Engines */
++ { /* Handle problems with rebooting on PC Engines apu2 */
++ .callback = set_pci_reboot,
++ .ident = "PC Engines apu2",
++ .matches = {
++ DMI_MATCH(DMI_BOARD_VENDOR, "PC Engines"),
++ DMI_MATCH(DMI_BOARD_NAME, "apu2"),
++ },
++ },
++
+ /* Sony */
+ { /* Handle problems with rebooting on Sony VGN-Z540N */
+ .callback = set_bios_reboot,
diff --git a/target/linux/x86/patches-5.4/800-hwmon-w83627ehf-dont-claim-nct677x.patch b/target/linux/x86/patches-5.4/800-hwmon-w83627ehf-dont-claim-nct677x.patch
new file mode 100644
index 0000000..a83ee3b
--- /dev/null
+++ b/target/linux/x86/patches-5.4/800-hwmon-w83627ehf-dont-claim-nct677x.patch
@@ -0,0 +1,30 @@
+--- a/drivers/hwmon/w83627ehf.c
++++ b/drivers/hwmon/w83627ehf.c
+@@ -2704,8 +2704,8 @@ static int __init w83627ehf_find(int sio
+ static const char sio_name_W83627UHG[] __initconst = "W83627UHG";
+ static const char sio_name_W83667HG[] __initconst = "W83667HG";
+ static const char sio_name_W83667HG_B[] __initconst = "W83667HG-B";
+- static const char sio_name_NCT6775[] __initconst = "NCT6775F";
+- static const char sio_name_NCT6776[] __initconst = "NCT6776F";
++/* static const char sio_name_NCT6775[] __initconst = "NCT6775F";
++ static const char sio_name_NCT6776[] __initconst = "NCT6776F"; */
+
+ u16 val;
+ const char *sio_name;
+@@ -2749,14 +2749,14 @@ static int __init w83627ehf_find(int sio
+ sio_data->kind = w83667hg_b;
+ sio_name = sio_name_W83667HG_B;
+ break;
+- case SIO_NCT6775_ID:
++/* case SIO_NCT6775_ID:
+ sio_data->kind = nct6775;
+ sio_name = sio_name_NCT6775;
+ break;
+ case SIO_NCT6776_ID:
+ sio_data->kind = nct6776;
+ sio_name = sio_name_NCT6776;
+- break;
++ break; */
+ default:
+ if (val != 0xffff)
+ pr_debug("unsupported chip ID: 0x%04x\n", val);