| /* |
| * Copyright (C) 2020 ASR Microelectronics Co., Ltd. |
| * |
| * This program is free software; you can redistribute it and/or modify |
| * it under the terms of the GNU General Public License version 2 as |
| * publishhed by the Free Software Foundation. |
| */ |
| |
| #include "asr1906.dtsi" |
| #ifdef CONFIG_FB_ASR |
| #ifdef CONFIG_FB_ASR_SPI |
| #define CONFIG_FB_ASR_SPI_DCX_GPIO |
| #endif |
| #endif |
| |
| / { |
| model = "ASR 1906(Kestrel2) EVB Board"; |
| compatible = "asr,1901-evb", "asr,1901"; |
| |
| chosen { |
| bootargs = "root=/dev/mtdblock5 rootfstype=squashfs init=/etc/preinit noinitrd console=ttyS1,115200 mem=128M"; |
| }; |
| |
| memory { |
| reg = <0x04000000 0x08000000>; |
| }; |
| |
| soc { |
| axi@d4200000 { /* AXI */ |
| #ifdef CONFIG_FB_ASR |
| lcd: lcd@d4203000 { |
| compatible = "asr,fb"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&lcd_pmx_func>; |
| interrupts = <0 75 0x4>; |
| reg = <0xd4203000 0x800>; |
| #ifdef CONFIG_FB_ASR_SPI_DCX_GPIO |
| rs_gpio = <&gpio 82 0>; /* must config rs pin when line = 4 */ |
| #endif |
| //avdd-supply = <&ldo1>; |
| status = "okay"; |
| }; |
| #endif |
| usb3phy: usb3phy@c0230000 { |
| status = "okay"; |
| }; |
| usb3_1: usb3-1 { |
| status = "okay"; |
| }; |
| |
| xgmac: ethernet@d4270000 { |
| pinctrl-names = "default", "rgmii"; |
| pinctrl-0 = <&xgmac_pmx_func0 &xgmac_pmx_func1 &xgmac_pmx_func3>; |
| pinctrl-1 = <&xgmac_pmx_func0 &xgmac_pmx_func1 &xgmac_pmx_func2 &xgmac_pmx_func3>; |
| |
| xgmac,no-phy-intterrupt; |
| phy-mode = "sgmii"; /* "2500base-x" */ |
| phy-handle = <&phy0>; |
| status = "okay"; |
| |
| reset-gpio = <&gpio 42 0>; |
| reset-active-low; |
| reset-delays-us = <0 100000 100000>; |
| |
| 3v3-ldo-gpio = <&gpio 41 0>; |
| 0v95-ldo-gpio = <&gpio 47 0>; |
| |
| mdio: mdio-bus { |
| compatible = "snps,dwmac-mdio"; |
| #address-cells = <0x1>; |
| #size-cells = <0x0>; |
| |
| phy0: phy@0 { |
| compatible = "ethernet-phy-ieee802.3-c22"; |
| device_type = "ethernet-phy"; |
| reg = <0x1>; /* set phy address*/ |
| interrupts = <0 112 0x4>; |
| }; |
| }; |
| }; |
| |
| qspi: spi@0xd420b000 { |
| asr,qspi-freq = <52000000>; |
| status = "okay"; |
| }; |
| /* SD card */ |
| sdh1: sdh@d4280000 { |
| pinctrl-names = "default", "fast"; |
| pinctrl-0 = <&sdh1_pmx_func2 &sdh1_pmx_func3 &sdh1_pmx_func4>; |
| pinctrl-1 = <&sdh1_pmx_func2_fast &sdh1_pmx_func3_fast &sdh1_pmx_func4>; |
| vmmc-supply = <&pm802ldo4>; |
| vqmmc-supply = <&pm802ldo6>; |
| vmmc2-supply = <&vcc_sdh1>; |
| bus-width = <4>; |
| non-removable; |
| broken-cd; |
| wp-inverted; |
| asr,sdh-pm-runtime-en; |
| asr,sdh-host-caps-disable = <(MMC_CAP_UHS_SDR104)>; |
| asr,sdh-quirks = <( |
| SDHCI_QUIRK_INVERTED_WRITE_PROTECT | |
| SDHCI_QUIRK_BROKEN_CARD_DETECTION |
| )>; |
| asr,sdh-quirks2 = <( |
| SDHCI_QUIRK2_SET_AIB_MMC | |
| SDHCI_QUIRK2_TUNING_ADMA_BROKEN | |
| SDHCI_QUIRK2_TIMEOUT_SHORT | |
| SDHCI_QUIRK2_BUS_CLK_GATE_ENABLED |
| )>; |
| asr,sdh-flags = <( |
| PXA_FLAG_ENABLE_CLOCK_GATING |
| )>; |
| /* prop "sdh-dtr-data": |
| <timing preset_rate src_rate tx_delay rx_delay tx_dline_reg rx_dline_reg> */ |
| asr,sdh-dtr-data = <PXA_MMC_TIMING_LEGACY PXA_SDH_DTR_26M PXA_SDH_DTR_104M 0 0 0 0>, |
| <PXA_MMC_TIMING_SD_HS PXA_SDH_DTR_52M PXA_SDH_DTR_104M 0 0 0 0>, |
| <PXA_MMC_TIMING_UHS_DDR50 PXA_SDH_DTR_52M PXA_SDH_DTR_104M 0 0 0 3>, |
| <PXA_MMC_TIMING_UHS_SDR50 PXA_SDH_DTR_104M PXA_SDH_DTR_208M 0 0 0 0>, |
| <PXA_MMC_TIMING_UHS_SDR104 PXA_SDH_DTR_208M PXA_SDH_DTR_208M 0 0 0 0>, |
| <PXA_MMC_TIMING_MAX PXA_SDH_DTR_PS_NONE PXA_SDH_DTR_104M 0 0 0 0>; |
| status = "disabled"; |
| }; |
| |
| /* SDIO */ |
| sdh2: sdh@d4280800 { |
| pinctrl-names = "default", "fast", "sleep"; |
| pinctrl-0 = <&sdh2_pmx_func1 &sdh2_pmx_func2 &sdh2_pmx_func3>; |
| pinctrl-1 = <&sdh2_pmx_func1_fast &sdh2_pmx_func2_fast &sdh2_pmx_func3>; |
| pinctrl-2 = <&sdh2_pmx_edge_wakeup>; |
| bus-width = <4>; |
| non-removable; |
| enable-sdio-wakeup; |
| /* clk-scaling-config: |
| <up_threshold down_threshold polling_interval> */ |
| clk-scaling-config = <25 12 200>; |
| min-ddr-qos = <156000 312000 400000>; |
| asr,sdh-pm-runtime-en; |
| asr,sdh-quirks = <(SDHCI_QUIRK_BROKEN_CARD_DETECTION)>; |
| asr,sdh-quirks2 = <(SDHCI_QUIRK2_FAKE_SDIO_IRQ_IN_UHS | |
| SDHCI_QUIRK2_TUNING_ADMA_BROKEN | |
| SDHCI_QUIRK2_BASE_CLOCK_ALWAYS_ON | |
| SDHCI_QUIRK2_MANUAL_CARD_DETECT | |
| SDHCI_QUIRK2_TIMEOUT_SHORT | |
| SDHCI_QUIRK2_NO_TIMER_RETUNING |
| )>; |
| asr,sdh-pm-caps = <(MMC_PM_KEEP_POWER)>; |
| asr,sdh-host-caps2 = <( |
| MMC_CAP2_ONLY_1_8V | |
| MMC_CAP2_DISABLE_PROBE_CDSCAN | |
| MMC_CAP2_CLK_SCALE | |
| MMC_CAP2_BUS_CLK_NO_SCALE |
| )>; |
| /* prop "sdh-dtr-data": |
| <timing preset_rate src_rate tx_delay rx_delay tx_dline_reg rx_dline_reg> */ |
| asr,sdh-dtr-data = <PXA_MMC_TIMING_LEGACY PXA_SDH_DTR_26M PXA_SDH_DTR_104M 0 0 0 0>, |
| <PXA_MMC_TIMING_SD_HS PXA_SDH_DTR_45M PXA_SDH_DTR_89M 0 0 0 0>, |
| <PXA_MMC_TIMING_UHS_DDR50 PXA_SDH_DTR_52M PXA_SDH_DTR_104M 0 0 0 3>, |
| <PXA_MMC_TIMING_UHS_SDR50 PXA_SDH_DTR_83M PXA_SDH_DTR_83M 0 0 0 3>, |
| <PXA_MMC_TIMING_UHS_SDR104 PXA_SDH_DTR_208M PXA_SDH_DTR_208M 0 0 0 0>, |
| <PXA_MMC_TIMING_MAX PXA_SDH_DTR_PS_NONE PXA_SDH_DTR_89M 0 0 0 0>; |
| status = "disabled"; |
| }; |
| pcie0: pcie@d4c00000 { |
| reset-gpios = <&gpio 16 0>; |
| status = "okay"; |
| }; |
| pcie1: pcie@0xd4800000{ |
| reset-gpios = <&gpio 66 0>; |
| status = "disabled"; |
| }; |
| ssp1: spi@d42a0c00 { |
| status = "disabled"; |
| }; |
| }; |
| |
| apb@d4000000 { |
| ssp2: spi@d401c000 { |
| status = "disabled"; |
| }; |
| ssp0: spi@d401b000 { |
| status = "okay"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&ssp0_pmx_func>; |
| asr,spi-inc-mode; |
| |
| si3217x: spidev@0{ |
| #address-cells = <1>; |
| #size-cells = <1>; |
| compatible = "silabs,si3217x"; |
| reg = <0>; |
| spi-cpol; |
| spi-cpha; |
| spi-max-frequency = <6500000>; |
| }; |
| }; |
| ssp_dai1: pxa-ssp-dai@1 { |
| compatible = "asr,pxa-ssp-dai"; |
| reg = <0x1 0x0>; |
| |
| platform_driver_name = "tdma_platform"; |
| burst_size = <4>; |
| playback_period_bytes = <2048>; |
| playback_buffer_bytes = <4096>; |
| capture_period_bytes = <2048>; |
| capture_buffer_bytes = <4096>; |
| }; |
| |
| mfpr: mfpr@d401e000 { |
| pinctrl-names = "default"; |
| reg = <0xd401e000 0x280>; |
| /* pinctrl-0 = <&mfp_pins_group_0 &mfp_pins_group_1 &mfp_pins_group_2 >;*/ |
| status = "okay"; |
| }; |
| edgewakeup: edgewakeup@d4019800 { |
| status = "okay"; |
| }; |
| rtc: rtc@d4010000 { |
| status = "okay"; |
| }; |
| timer0: timer@d4014000 { |
| status = "okay"; |
| }; |
| /* disable uart1 as cp is printing log thru uart1 */ |
| uart1: uart@d4017000 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&uart1_rxd &uart1_txd>; |
| status = "disabled"; |
| }; |
| uart2: uart@d4018000 { /* kestrel evb use ap uart */ |
| pinctrl-names = "default","sleep"; |
| pinctrl-0 = <&uart2_pmx_func1 &uart2_pmx_func2>; |
| pinctrl-1 = <&uart2_pmx_func1 &uart2_pmx_func2_sleep>; |
| edge-wakeup-gpio = <&gpio 64 0>; /* GPIO64: AP UART rx pin */ |
| status = "okay"; |
| }; |
| uart3: uart@d4017800 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&uart3_pmx_func>; |
| status = "disabled"; |
| }; |
| pmx: pinmux@d401e000 { |
| /* pin base = base_addr / 4, nr pins & gpio function */ |
| pinctrl-single,gpio-range = < |
| /* |
| * GPIO number is hardcoded for range at here. |
| * In gpio chip, GPIO number is not hardcoded for range. |
| * Since one gpio pin may be routed to multiple pins, |
| * define these gpio range in pxa910-dkb.dts not pxa910.dtsi. |
| */ |
| &range 1 26 0 /* GPIO0 ~ GPIO25 */ |
| &range 131 66 0 /* GPIO26 ~ GPIO91 */ |
| &range 78 20 2 /* GPIO92 ~ GPIO111 */ |
| >; |
| |
| #ifdef CONFIG_FB_ASR |
| lcd_pmx_func: lcd_pmx_func { |
| pinctrl-single,pins = < |
| GPIO57 AF5 // LCD_CS0 |
| GPIO58 AF5 // LCD_RSTB |
| GPIO59 AF5 // LCD_VSYNC |
| #ifdef CONFIG_FB_ASR_MCU |
| GPIO60 AF5 // LCD_WRB |
| GPIO61 AF5 // LCD_RDB |
| GPIO62 AF5 // LCD_A0 |
| GPIO67 AF5 // LCD_DB0 |
| GPIO68 AF5 // LCD_DB1 |
| GPIO69 AF5 // LCD_DB2 |
| GPIO70 AF5 // LCD_DB3 |
| GPIO71 AF5 // LCD_DB4 |
| GPIO72 AF5 // LCD_DB5 |
| GPIO73 AF5 // LCD_DB6 |
| GPIO74 AF5 // LCD_DB7 |
| #ifdef CONFIG_FB_ASR_MCU16 |
| GPIO75 AF5 // LCD_DB8 |
| GPIO76 AF5 // LCD_DB9 |
| GPIO77 AF5 // LCD_DB10 |
| #endif |
| #endif |
| GPIO78 AF5 // LCD_SPI_DOUT/LCD_DB11 |
| GPIO79 AF5 // LCD_SPI_DIN/LCD_DB12 |
| GPIO80 AF5 // LCD_SPI_CLK/LCD_DB13 |
| GPIO81 AF5 // LCD_SPI_DC_RS/LCD_DB14 |
| #ifdef CONFIG_FB_ASR_SPI_DCX_GPIO |
| GPIO82 AF0 // LCD_SPI_DOUT2/LCD_DB15 |
| #else |
| GPIO82 AF5 // LCD_SPI_DOUT2/LCD_DB15 |
| #endif |
| >; |
| /* NOTE: need to PULL_UP here */ |
| DS_MEDIUM;PULL_UP;EDGE_NONE;LPM_NONE; |
| }; |
| #endif |
| ssp0_pmx_func: ssp0_pmx_func { |
| pinctrl-single,pins = < |
| GPIO89 AF1 /* TXD */ |
| GPIO90 AF1 /* RXD */ |
| GPIO88 AF1 /* FRM */ |
| GPIO87 AF1 /* SCLK */ |
| >; |
| DS_MEDIUM;PULL_NONE;EDGE_NONE;LPM_NONE; |
| }; |
| lcd_bl_func: lcd_bl_func { |
| pinctrl-single,pins = < |
| GPIO49 AF0 /* reset */ |
| GPIO50 AF0 /* reset */ |
| GPIO51 AF0 /* reset */ |
| GPIO52 AF0 /* lcd d/c */ |
| >; |
| MFP_DEFAULT; |
| }; |
| |
| twsi0_pmx_func: twsi0_pmx_func { |
| pinctrl-single,pins = < |
| GPIO18 AF1 |
| GPIO19 AF1 |
| >; |
| MFP_LPM_FLOAT; |
| }; |
| twsi0_pmx_gpio: twsi0_pmx_gpio { |
| pinctrl-single,pins = < |
| GPIO18 AF0 |
| GPIO19 AF0 |
| >; |
| MFP_LPM_FLOAT; |
| }; |
| twsi1_pmx_func: twsi1_pmx_func { |
| pinctrl-single,pins = < |
| GPIO20 AF1 |
| GPIO21 AF1 |
| >; |
| MFP_LPM_FLOAT; |
| }; |
| twsi1_pmx_gpio: twsi1_pmx_gpio { |
| pinctrl-single,pins = < |
| GPIO20 AF0 |
| GPIO21 AF0 |
| >; |
| MFP_LPM_FLOAT; |
| }; |
| twsi2_pmx_func: twsi2_pmx_func { |
| pinctrl-single,pins = < |
| GPIO22 AF1 |
| GPIO23 AF1 |
| >; |
| MFP_LPM_FLOAT; |
| }; |
| twsi2_pmx_gpio: twsi2_pmx_gpio { |
| pinctrl-single,pins = < |
| GPIO22 AF0 |
| GPIO23 AF0 |
| >; |
| MFP_LPM_FLOAT; |
| }; |
| twsi4_pmx_func: twsi4_pmx_func { |
| pinctrl-single,pins = < |
| GPIO35 AF1 |
| GPIO36 AF1 |
| >; |
| MFP_LPM_FLOAT; |
| }; |
| twsi4_pmx_gpio: twsi4_pmx_gpio { |
| pinctrl-single,pins = < |
| GPIO35 AF0 |
| GPIO36 AF0 |
| >; |
| MFP_LPM_FLOAT; |
| }; |
| /* no pull, no LPM */ |
| dvc_pmx_func: dvc_pmx_func { |
| /* hw-dvc */ |
| pinctrl-single,pins = < |
| GPIO28 AF1 |
| GPIO27 AF1 |
| >; |
| DS_MEDIUM;PULL_FLOAT;EDGE_NONE;LPM_NONE; |
| }; |
| #if 0 |
| i2s_func: i2s_func { |
| pinctrl-single,pins = < |
| GPIO25 AF1 |
| GPIO26 AF1 |
| >; |
| MFP_DEFAULT; |
| }; |
| i2s_gpio: i2s_gpio { |
| pinctrl-single,pins = < |
| GPIO25 AF0 |
| GPIO26 AF0 |
| >; |
| MFP_LPM_FLOAT; |
| }; |
| #endif |
| uart1_rxd: uart1_rxd { |
| /* gps dedicated uart */ |
| pinctrl-single,pins = < |
| GPIO54 AF2 |
| >; |
| MFP_DEFAULT; |
| }; |
| uart1_txd: uart1_txd { |
| /* gps dedicated uart */ |
| pinctrl-single,pins = < |
| GPIO53 AF2 |
| >; |
| MFP_DEFAULT; |
| }; |
| uart2_pmx_func1: uart2_pmx_func1 { |
| pinctrl-single,pins = < |
| GPIO63 AF1 |
| >; |
| MFP_DEFAULT; |
| }; |
| uart2_pmx_func2: uart2_pmx_func2 { |
| pinctrl-single,pins = < |
| GPIO64 AF1 |
| >; |
| MFP_DEFAULT; |
| }; |
| uart2_pmx_func2_sleep: uart2_pmx_func2_sleep { |
| pinctrl-single,pins = < |
| GPIO64 AF1 |
| >; |
| DS_MEDIUM;PULL_NONE;EDGE_BOTH;SL_NORMAL; |
| }; |
| uart2_z2_pmx_func1: uart2_z2_pmx_func1 { |
| pinctrl-single,pins = < |
| GPIO40 AF5 |
| >; |
| MFP_DEFAULT; |
| }; |
| uart2_z2_pmx_func2: uart2_z2_pmx_func2 { |
| pinctrl-single,pins = < |
| GPIO39 AF5 |
| >; |
| MFP_DEFAULT; |
| }; |
| uart2_z2_pmx_func2_sleep: uart2_z2_pmx_func2_sleep { |
| pinctrl-single,pins = < |
| GPIO39 AF5 |
| >; |
| DS_MEDIUM;PULL_NONE;EDGE_BOTH;SL_NORMAL; |
| }; |
| uart3_pmx_func: uart3_pmx_func { |
| pinctrl-single,pins = < |
| GPIO49 AF1 |
| GPIO50 AF1 |
| >; |
| MFP_DEFAULT; |
| }; |
| |
| panel_rst_func: panel_rst_func { |
| pinctrl-single,pins = < |
| /*GPIO87 AF0*/ |
| >; |
| DS_MEDIUM;PULL_FLOAT;EDGE_NONE;LPM_NONE; |
| }; |
| |
| sd_ldo_en: sd_ldo_en { |
| pinctrl-single,pins = < |
| GPIO91 AF0 |
| >; |
| MFP_LPM_PULL_DW; |
| }; |
| |
| sdh1_pmx_func2: sdh1_pmx_func2 { |
| pinctrl-single,pins = < |
| MMC1_DAT3 AF0 |
| MMC1_DAT2 AF0 |
| MMC1_DAT1 AF0 |
| MMC1_DAT0 AF0 |
| MMC1_CMD AF0 |
| >; |
| DS_SLOW1;PULL_NONE;EDGE_NONE;LPM_NONE; |
| }; |
| sdh1_pmx_func3: sdh1_pmx_func3 { |
| pinctrl-single,pins = < |
| MMC1_CLK AF0 |
| >; |
| DS_SLOW1;PULL_NONE;EDGE_NONE;LPM_DRIVE_LOW; |
| }; |
| sdh1_pmx_func4: sdh1_pmx_func4 { |
| pinctrl-single,pins = < |
| GPIO66 AF0 |
| >; |
| MFP_PULL_UP; |
| }; |
| sdh1_pmx_func2_fast: sdh1_pmx_func2_fast { |
| pinctrl-single,pins = < |
| MMC1_DAT3 AF0 |
| MMC1_DAT2 AF0 |
| MMC1_DAT1 AF0 |
| MMC1_DAT0 AF0 |
| MMC1_CMD AF0 |
| >; |
| DS_FAST;PULL_NONE;EDGE_NONE;LPM_NONE; |
| }; |
| sdh1_pmx_func3_fast: sdh1_pmx_func3_fast { |
| pinctrl-single,pins = < |
| MMC1_CLK AF0 |
| >; |
| DS_FAST;PULL_NONE;EDGE_NONE;LPM_DRIVE_LOW; |
| }; |
| sdh2_pmx_func1_fast: sdh2_pmx_func1_fast { |
| pinctrl-single,pins = < |
| GPIO13 AF0 /* WLAN_DAT3 */ |
| GPIO14 AF0 /* WLAN_DAT2 */ |
| GPIO15 AF0 /* WLAN_DAT1 */ |
| GPIO16 AF0 /* WLAN_DAT0 */ |
| GPIO17 AF0 /* WLAN_CMD */ |
| >; |
| DS_FAST;PULL_NONE;EDGE_NONE;LPM_NONE; |
| }; |
| sdh2_pmx_func2_fast: sdh2_pmx_func2_fast { |
| pinctrl-single,pins = < |
| GPIO18 AF0 /* WLAN_CLK */ |
| >; |
| DS_FAST;PULL_NONE;EDGE_NONE;LPM_DRIVE_LOW; |
| }; |
| sdh2_pmx_func1: sdh2_pmx_func1 { |
| pinctrl-single,pins = < |
| GPIO10 AF0 /* WLAN_CLK */ |
| >; |
| MFP_DEFAULT; |
| }; |
| sdh2_pmx_func2: sdh2_pmx_func2 { |
| pinctrl-single,pins = < |
| GPIO10 AF0 /* WLAN_CLK */ |
| >; |
| MFP_LPM_DRIVE_LOW; |
| }; |
| sdh2_pmx_func3: sdh2_pmx_func3 { |
| pinctrl-single,pins = < |
| GPIO10 AF0 /* VCXO_REQ AF1 WLAN_WAKE_HOST */ |
| >; |
| MFP_PULL_DOWN; |
| }; |
| sdh2_pmx_edge_wakeup: sdh2_pmx_edge_wakeup { |
| pinctrl-single,pins = < |
| GPIO10 AF0 /* VCXO_REQ AF1 */ |
| >; |
| DS_MEDIUM;PULL_DOWN;EDGE_RISE;LPM_NONE; |
| }; |
| sdh2_pmx_pd_rst_off: sdh2_pmx_pd_rst_off { |
| pinctrl-single,pins = < |
| /* GPIO31 AF0 WLAN_PDn */ |
| GPIO13 AF0 /* GPIO32 AF0 LDO_EN */ |
| >; |
| MFP_LPM_DRIVE_LOW; |
| }; |
| sdh2_pmx_pd_rst_on: sdh2_pmx_pd_rst_on { |
| pinctrl-single,pins = < |
| /* GPIO11 AF0 WLAN_PDn */ |
| GPIO13 AF0 /* GPIO32 AF0 LDO_EN */ |
| >; |
| MFP_LPM_DRIVE_HIGH; |
| }; |
| |
| alc5616_pmx_func1: alc5616_pmx_func1 { |
| pinctrl-single,pins = < |
| CP_GPO_10 AF2 /* Headset detection IRQ */ |
| GPIO26 AF2 /* MCLK */ |
| >; |
| MFP_DEFAULT; |
| }; |
| alc5616_pmx_func2: alc5616_pmx_func2 { |
| pinctrl-single,pins = < |
| CP_GPO_10 AF2 /* Headset detection IRQ */ |
| GPIO26 AF2 /* MCLK */ |
| >; |
| MFP_DEFAULT; |
| }; |
| slic_pmx_func1: slic_pmx_func1 { |
| pinctrl-single,pins = < |
| CP_GPO_5 AF2 /* SLIC_INT GPIO97 */ |
| CP_GPO_2 AF2 /* SLIC_LDO_EN GPIO94 */ |
| >; |
| MFP_DEFAULT; |
| }; |
| slic_pmx_func2: slic_pmx_func2 { |
| pinctrl-single,pins = < |
| CP_GPO_4 AF2 /* SLIC_RESET GPIO96 */ |
| >; |
| MFP_DEFAULT; |
| }; |
| slic_pmx_func1_sleep: slic_pmx_func1_sleep { |
| pinctrl-single,pins = < |
| CP_GPO_5 AF2 /* SLIC_INT GPIO97 */ |
| >; |
| DS_MEDIUM;PULL_UP;EDGE_BOTH;LPM_NONE; |
| }; |
| otg_vbus_func: otg_vbus_func { |
| pinctrl-single,pins = < |
| VBUS_DRV AF1 /* GPIO[122] */ |
| >; |
| DS_MEDIUM;PULL_DOWN;EDGE_NONE;LPM_DRIVE_LOW; |
| }; |
| |
| xgmac_pmx_func0: xgmac_pmx_func0 { |
| pinctrl-single,pins = < |
| GPIO12 AF1 /* GMAC1_TX_MDC */ |
| GPIO14 AF1 /* GMAC1_INT_N */ |
| >; |
| DS_MEDIUM;PULL_DOWN;EDGE_NONE;LPM_NONE; |
| }; |
| xgmac_pmx_func1: emac_pmx_func1 { |
| pinctrl-single,pins = < |
| GPIO13 AF1 /* GMAC1_TX_MDIO */ |
| >; |
| DS_MEDIUM;PULL_UP;EDGE_NONE;LPM_NONE; |
| }; |
| xgmac_pmx_func2: xgmac_pmx_func2 { |
| pinctrl-single,pins = < |
| GPIO00 AF1 /* GMAC1_RX_DV */ |
| GPIO01 AF1 /* GMAC1_RX_D0 */ |
| GPIO02 AF1 /* GMAC1_RX_D1 */ |
| GPIO03 AF1 /* GMAC1_RX_CLK */ |
| GPIO04 AF1 /* GMAC1_RX_D2 */ |
| GPIO05 AF1 /* GMAC1_RX_D3 */ |
| GPIO06 AF1 /* GMAC1_TX_D0 */ |
| GPIO07 AF1 /* GMAC1_TX_D1 */ |
| GPIO08 AF1 /* GMAC1_TX_CLK */ |
| GPIO09 AF1 /* GMAC1_TX_D2 */ |
| GPIO10 AF1 /* GMAC1_TX_D3 */ |
| GPIO11 AF1 /* GMAC1_TX_EN */ |
| >; |
| DS_MEDIUM;PULL_DOWN;EDGE_NONE;LPM_NONE; |
| }; |
| xgmac_pmx_func3: xgmac_pmx_func3 { |
| pinctrl-single,pins = < |
| GPIO42 AF0 /* RESET */ |
| GPIO41 AF0 /* 3.3v LDO_EN */ |
| GPIO47 AF0 /* 0.95v LDO_EN */ |
| >; |
| MFP_LPM_DRIVE_HIGH; |
| }; |
| usb_vbus_pinmux: usb_vbus_pinmux { |
| pinctrl-single,pins = < |
| GPIO24 AF1 /* vbus */ |
| >; |
| DS_MEDIUM;PULL_DOWN;EDGE_NONE;LPM_NONE; |
| }; |
| |
| usb_typec_pinmux: usb_typec_pinmux { |
| pinctrl-single,pins = < |
| GPIO17 AF1 /* typec direction */ |
| >; |
| DS_MEDIUM;PULL_FLOAT;EDGE_NONE;LPM_NONE; |
| }; |
| pcie_pmx_pd_rst_off: pcie_pmx_pd_rst_off { |
| pinctrl-single,pins = < |
| GPIO16 AF0 /* PERST_N */ |
| GPIO35 AF0 /* DC_EN */ |
| GPIO66 AF0 /* PERST2_N */ |
| >; |
| MFP_LPM_DRIVE_LOW; |
| }; |
| pcie_pmx_pd_rst_on: pcie_pmx_pd_rst_on { |
| pinctrl-single,pins = < |
| GPIO16 AF0 /* PERST_N */ |
| GPIO35 AF0 /* DC_EN */ |
| GPIO66 AF0 /* PERST2_N */ |
| >; |
| MFP_LPM_DRIVE_HIGH; |
| }; |
| usim1_pmx_func: usim1_pmx_func { |
| pinctrl-single,pins = < |
| GPIO43 AF0 |
| >; |
| DS_MEDIUM;PULL_UP;EDGE_NONE;SL_NORMAL; |
| }; |
| usim1_pmx_func_sleep: usim1_pmx_func_sleep { |
| pinctrl-single,pins = < |
| GPIO43 AF0 |
| >; |
| DS_MEDIUM;PULL_UP;EDGE_BOTH;SL_NORMAL; |
| }; |
| }; |
| #ifdef CONFIG_ASR_SULOG |
| sulog: ripc1@d40b0100 { |
| status= "okay"; |
| }; |
| #endif |
| twsi0: i2c@d4011000 { |
| status= "okay"; |
| |
| pmic7: pm813@30 { |
| compatible = "asr,pm813"; |
| reg = <0x30>; |
| interrupts = <0 43 0x4>; |
| interrupt-parent = <&gic>; |
| interrupt-controller; |
| #interrupt-cells = <1>; |
| chg_irq_from_exton; |
| usb { |
| status = "disabled"; |
| vbus-gpio = <0xff>; /* set_vbus */ |
| id-gpadc = <0xff>; /* usb-id */ |
| vchg-from-exton = <1>; |
| vbus-detect = <1>; /* vbus-irq */ |
| get-vbus = <1>; /* get-vbus */ |
| }; |
| }; |
| /* |
| pmic4: 88pm805@38 { |
| compatible = "marvell,88pm805"; |
| reg = <0x38>; |
| }; |
| */ |
| }; |
| twsi1: i2c@d4010800{ |
| status= "okay"; |
| |
| alc5616@1b { |
| compatible = "asrmicro,alc5616"; |
| reg = <0x1b>; |
| pinctrl-names = "default", "sleep"; |
| pinctrl-0 = <&alc5616_pmx_func1>; |
| pinctrl-1 = <&alc5616_pmx_func2>; |
| irq-gpio = <&gpio 102 0>;/* CODEC_IRQ for headset detection */ |
| vdd18-supply = <&pm813ldo6>; |
| vdd33-supply = <&pm813ldo8>; |
| status= "okay"; |
| }; |
| /* |
| nau8810@1a { |
| compatible = "marvell,nau8810"; |
| reg = <0x1a>; |
| }; |
| */ |
| }; |
| twsi2: i2c@d4013800 { |
| status= "okay"; |
| fusb301@21 { |
| compatible = "asr,fusb301-typec"; |
| reg = <0x21>; |
| }; |
| }; |
| twsi3: i2c@d4018800 { |
| status = "disabled"; |
| |
| pmic4: 88pm805@38 { |
| compatible = "marvell,88pm805"; |
| reg = <0x38>; |
| }; |
| pmic5: pm802@00 { |
| compatible = "asr,pm802"; |
| status = "disabled"; |
| reg = <0x00>; |
| interrupts = <0 43 0x4>; |
| interrupt-parent = <&gic>; |
| interrupt-controller; |
| #interrupt-cells = <1>; |
| chg_irq_from_exton; |
| battery { |
| compatible = "asr,pm802-bat"; |
| status = "disabled"; |
| |
| online-gpadc = <1>; |
| temperature-gpadc = <1>; |
| |
| hi-volt-online = <1150>; /* mV */ |
| lo-volt-online = <20>; /* mV */ |
| hi-volt-temp = <1150>; /* mV */ |
| lo-volt-temp = <200>; /* mV */ |
| |
| sw-fg-use-ntc; |
| full-capacity = <2050>; /* mAh */ |
| r1-resistor = <40>; /* mohm */ |
| r2-resistor = <30>; /* mohm */ |
| rs-resistor = <120>; /* mohm */ |
| roff-resistor = <0>; /* mohm */ |
| roff-initial-resistor = <0>; /* mohm */ |
| |
| times-in-zero-degree = <1>; |
| offset-in-zero-degree = <0>; |
| |
| times-in-ten-degree = <2>; |
| offset-in-ten-degree = <100>; |
| |
| power-off-threshold = <3350>; /* mV */ |
| safe-power-off-threshold = <3200>; /* mV */ |
| |
| online-gp-bias-curr = <11>; /* uA */ |
| |
| soc-ramp-up-interval = <150>; /* s */ |
| /* choose -20C, 0C, 10C, 40C, 45C, 55C as threshold */ |
| tbat-threshold = <20 0 10 40 45 55>; /* ohm */ |
| ntc-table-size = <88>; |
| stop-chg-for-vbatmeas; |
| /* -24C, -23C, ..., 62C, 63C */ |
| ntc-table = < |
| 89680 85130 80840 76790 72970 69360 65960 62740 |
| 59700 56830 54130 51530 49100 46800 44610 42550 |
| 40590 38730 36970 35300 33710 32210 30780 29420 |
| 28130 26910 25750 24640 23590 22580 21630 20720 |
| 19860 19030 18250 17500 16790 16110 15460 14840 |
| 14250 13690 13150 12640 12150 11680 11230 10800 |
| 10390 10000 9620 9270 8920 8590 8280 7980 |
| 7690 7410 7150 6890 6650 6410 6190 5970 |
| 5770 5570 5380 5190 5020 4850 4680 4530 |
| 4380 4230 4100 3960 3830 3710 3590 3480 |
| 3370 3260 3160 3060 2960 2870 2780 2700 |
| >; |
| }; |
| usb { |
| status = "disabled"; |
| vbus-gpio = <0xff>; /* set_vbus */ |
| id-gpadc = <0xff>; /* usb-id */ |
| vchg-from-exton = <1>; |
| vbus-detect = <1>; /* vbus-irq */ |
| get-vbus = <1>; /* get-vbus */ |
| }; |
| }; |
| pmic826: pm826@20 { |
| status = "okay"; |
| compatible = "asr,pm826"; |
| reg = <0x20>; |
| dvc { |
| status = "okay"; |
| compatible = "marvell,88pm8xx-dvc"; |
| dvc-affected-buckbits = <1>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&dvc_pmx_func>; |
| }; |
| }; |
| }; |
| }; |
| }; |
| |
| vcc_sdh1: sd-regulator { |
| compatible = "regulator-fixed"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&sd_ldo_en>; |
| regulator-name = "SDH1 VCC"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| gpio = <&gpio 12 0>; |
| enable-active-high; |
| }; |
| |
| asr-rfkill { |
| compatible = "asr,asr-rfkill"; |
| pinctrl-names = "off", "on"; |
| pinctrl-0 = <&sdh2_pmx_pd_rst_off>; |
| pinctrl-1 = <&sdh2_pmx_pd_rst_on>; |
| sd-host = <&sdh2>; |
| pd-gpio = <&gpio 11 0>; |
| 3v3-ldo-gpio = <&gpio 13 0>; |
| edge-wakeup-gpio = <&gpio 10 0>; |
| status = "disabled"; |
| }; |
| |
| pcie-rfkill { |
| compatible = "mrvl,pcie-rfkill"; |
| pinctrl-names = "off", "on"; |
| pinctrl-0 = <&pcie_pmx_pd_rst_off>; |
| pinctrl-1 = <&pcie_pmx_pd_rst_on>; |
| rst-gpio = <&gpio 16 0>; |
| rst-gpio2 = <&gpio 66 0>; |
| 3v3-ldo-gpio = <&gpio 35 0>; |
| wib_3v3-supply = <&pm813ldo3>; |
| status = "okay"; |
| }; |
| |
| usim1: usim { |
| compatible = "asr,usim1"; |
| pinctrl-names = "default", "sleep"; |
| pinctrl-0 = <&usim1_pmx_func>; |
| pinctrl-1 = <&usim1_pmx_func_sleep>; |
| edge_detect_gpio = <43>; /* GPIO43: SIM detect pin */ |
| status = "okay"; |
| }; |
| |
| sound { |
| compatible = "ASRMICRO,asrmicro-snd-card"; |
| ssp-controllers = <&ssp_dai1>; |
| }; |
| |
| audio_regs { |
| compatible = "ASRMICRO,audio-registers"; |
| reg = <0xd680004c 0x8>; |
| status = "okay"; |
| }; |
| |
| nz3-slic { |
| compatible = "asr,nz3-slic"; |
| pinctrl-names = "default", "sleep"; |
| pinctrl-0 = <&slic_pmx_func1 &slic_pmx_func2>; |
| pinctrl-1 = <&slic_pmx_func1_sleep &slic_pmx_func2>; |
| rst-gpio = <&gpio 96 0>; |
| edge-wakeup-gpio = <&gpio 97 0>; |
| vdd-3v3-gpio = <&gpio 94 0>; |
| status = "disabled"; |
| }; |
| |
| microsemi-slic { |
| compatible = "asr,microsemi-slic"; |
| pinctrl-names = "default", "sleep"; |
| pinctrl-0 = <&slic_pmx_func1>; |
| pinctrl-1 = <&slic_pmx_func1_sleep>; |
| edge-wakeup-gpio = <&gpio 97 0>; |
| vdd-3v3-gpio = <&gpio 94 0>; |
| status = "disabled"; |
| }; |
| maxlinear-slic { |
| compatible = "asr,maxlinear-slic"; |
| pinctrl-names = "default", "sleep"; |
| pinctrl-0 = <&slic_pmx_func1 &slic_pmx_func2>; |
| pinctrl-1 = <&slic_pmx_func1_sleep &slic_pmx_func2>; |
| rst-gpio = <&gpio 96 0>; |
| edge-wakeup-gpio = <&gpio 97 0>; |
| vdd-3v3-gpio = <&gpio 94 0>; |
| status = "disabled"; |
| }; |
| }; |
| |
| #include "asr_pm813_asr1906.dtsi" |
| #include "asr_pm802_190x.dtsi" |
| |
| #ifdef CONFIG_AB_SYSTEM |
| #include "asr1901_ab_flash_layout.dtsi" |
| #else |
| #include "asr1901_flash_layout.dtsi" |
| #endif |