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/* SPDX-License-Identifier: GPL-2.0 */
/*
* asr clock source file
*
* Copyright (C) 2022 ASR Micro Limited
*/
#ifndef __ASR_CLK_ASR1901_H__
#define __ASR_CLK_ASR1901_H__
#include "clk.h"
struct asr1901_clk_unit {
struct mmp_clk_unit unit;
void __iomem *mpmu_base;
void __iomem *apmu_base;
void __iomem *apbc_base;
void __iomem *apbcp_base;
void __iomem *apbs_base;
void __iomem *ciu_base;
void __iomem *ddrc_base;
};
struct clk *hwsel2parent(struct parents_table *parent_table,
int parent_table_size, u32 src_sel);
void acquire_fc_mutex(void);
void release_fc_mutex(void);
void __init asr1901_acpu_init(struct asr1901_clk_unit *asr_unit);
void __init asr1901_ddrc_init(struct asr1901_clk_unit *asr_unit);
#endif