marvell/linux/drivers/mtd/nand/spi/dosilicon.c

// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (C) 2021 ASR Micro Limited
 *
 * Authors:
 *	Fei Lv <feilv@asrmicro.com>
 */

#include <linux/device.h>
#include <linux/kernel.h>
#include <linux/mtd/spinand.h>

#define SPINAND_MFR_DOSILICON		0xE5

#define DS35XXGBXXX_STATUS_ECC_MASK		GENMASK(6, 4)
#define DS35XXGBXXX_STATUS_ECC_NO_BITFLIPS	(0 << 4)
#define DS35XXGBXXX_STATUS_ECC_1_3_BITFLIPS	(1 << 4)
#define DS35XXGBXXX_STATUS_ECC_UNCOR_ERROR	(2 << 4)
#define DS35XXGBXXX_STATUS_ECC_4_6_BITFLIPS	(3 << 4)
#define DS35XXGBXXX_STATUS_ECC_7_8_BITFLIPS	(5 << 4)

static SPINAND_OP_VARIANTS(read_cache_variants,
		SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
		SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
		SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
		SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));

static SPINAND_OP_VARIANTS(write_cache_variants,
		SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
		SPINAND_PROG_LOAD(true, 0, NULL, 0));

static SPINAND_OP_VARIANTS(update_cache_variants,
		SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
		SPINAND_PROG_LOAD(false, 0, NULL, 0));

static int ds35xxgaxx_ooblayout_ecc(struct mtd_info *mtd, int section,
				  struct mtd_oob_region *region)
{
	if (section > 3)
		return -ERANGE;

	region->offset = (16 * section) + 8;
	region->length = 8;

	return 0;
}

static int ds35xxgaxx_ooblayout_free(struct mtd_info *mtd, int section,
				   struct mtd_oob_region *region)
{
	if (section > 3)
		return -ERANGE;

	region->offset = (16 * section) + 2;
	region->length = 8;

	return 0;
}

static const struct mtd_ooblayout_ops ds35xxgaxx_ooblayout = {
	.ecc = ds35xxgaxx_ooblayout_ecc,
	.free = ds35xxgaxx_ooblayout_free,
};


static int ds35xxgbxxx_ooblayout_ecc(struct mtd_info *mtd, int section,
				       struct mtd_oob_region *region)
{
	if (section > 0)
		return -ERANGE;

	region->offset = 64;
	region->length = 64;

	return 0;
}

static int ds35xxgbxxx_ooblayout_free(struct mtd_info *mtd, int section,
					struct mtd_oob_region *region)
{
	if (section > 0)
		return -ERANGE;

	/* reserve 2 bytes for the bad block mask */
	region->offset = 2;
	region->length = 62;

	return 0;
}

static int ds35xxgbxxx_ecc_get_status(struct spinand_device *spinand, u8 status)
{
	switch (status & DS35XXGBXXX_STATUS_ECC_MASK) {
	case DS35XXGBXXX_STATUS_ECC_NO_BITFLIPS:
		return 0;

	case DS35XXGBXXX_STATUS_ECC_1_3_BITFLIPS:
		return 3;

	case DS35XXGBXXX_STATUS_ECC_4_6_BITFLIPS:
		return 6;

	case DS35XXGBXXX_STATUS_ECC_7_8_BITFLIPS:
		return 8;

	case DS35XXGBXXX_STATUS_ECC_UNCOR_ERROR:
		return -EBADMSG;

	default:
		break;
	}

	return -EINVAL;
}

static const struct mtd_ooblayout_ops ds35xxgbxxx_ooblayout = {
	.ecc = ds35xxgbxxx_ooblayout_ecc,
	.free = ds35xxgbxxx_ooblayout_free,
};

static const struct spinand_info dosilicon_spinand_table[] = {
	SPINAND_INFO("DS35M1GAxx", 0x21,
		     NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
		     NAND_ECCREQ(4, 512),
		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
					      &write_cache_variants,
					      &update_cache_variants),
		     SPINAND_HAS_QE_BIT | SPINAND_RDM_CMD_HAS_LIMIT,
		     SPINAND_ECCINFO(&ds35xxgaxx_ooblayout, NULL)),
	SPINAND_INFO("DS35M2GAxx", 0x22,
		     NAND_MEMORG(1, 2048, 64, 64, 2048, 20, 2, 1, 1),
		     NAND_ECCREQ(4, 512),
		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
					      &write_cache_variants,
					      &update_cache_variants),
		     SPINAND_HAS_QE_BIT | SPINAND_RDM_CMD_HAS_LIMIT,
		     SPINAND_ECCINFO(&ds35xxgaxx_ooblayout, NULL)),
	SPINAND_INFO("DS35M2GBxx", 0xA2,
		     NAND_MEMORG(1, 2048, 128, 64, 2048, 20, 2, 1, 1),
		     NAND_ECCREQ(8, 512),
		     SPINAND_INFO_OP_VARIANTS_TIMING(
					      &read_cache_variants,
					      &write_cache_variants,
					      &update_cache_variants,
					      10, 2, 2, 78000000),
		     SPINAND_HAS_QE_BIT | SPINAND_RDM_CMD_HAS_LIMIT,
		     SPINAND_ECCINFO(&ds35xxgbxxx_ooblayout,
				     ds35xxgbxxx_ecc_get_status)),
	SPINAND_INFO("DS35M4GMxx", 0xA4,
		     NAND_MEMORG(1, 2048, 128, 64, 4096, 20, 2, 1, 1),
		     NAND_ECCREQ(8, 512),
		     SPINAND_INFO_OP_VARIANTS_TIMING(
					      &read_cache_variants,
					      &write_cache_variants,
					      &update_cache_variants,
					      10, 2, 2, 78000000),
		     SPINAND_HAS_QE_BIT | SPINAND_RDM_CMD_HAS_LIMIT,
		     SPINAND_ECCINFO(&ds35xxgbxxx_ooblayout,
				     ds35xxgbxxx_ecc_get_status)),
};

/**
 * dosilicon_spinand_detect - initialize device related part in spinand_device
 * struct if it is a Dosilicon device.
 * @spinand: SPI NAND device structure
 */
static int dosilicon_spinand_detect(struct spinand_device *spinand)
{
	u8 *id = spinand->id.data;
	int ret;

	if (id[1] != SPINAND_MFR_DOSILICON)
		return 0;

	ret = spinand_match_and_init(spinand, dosilicon_spinand_table,
				     ARRAY_SIZE(dosilicon_spinand_table), id[2]);
	if (ret)
		return ret;

	return 1;
}

static const struct spinand_manufacturer_ops dosilicon_spinand_manuf_ops = {
	.detect = dosilicon_spinand_detect,
};

const struct spinand_manufacturer dosilicon_spinand_manufacturer = {
	.id = SPINAND_MFR_DOSILICON,
	.name = "Dosilicon",
	.ops = &dosilicon_spinand_manuf_ops,
};