marvell/linux/drivers/mtd/nand/spi/macronix.c - T108 - Gitiles

 // SPDX-License-Identifier: GPL-2.0
 /*
  * Copyright (c) 2018 Macronix
  *
  * Author: Boris Brezillon <boris.brezillon@bootlin.com>
  */

 #include <linux/device.h>
 #include <linux/kernel.h>
 #include <linux/mtd/spinand.h>

 #define SPINAND_MFR_MACRONIX		0xC2
 #define MACRONIX_ECCSR_MASK		0x0F

 static SPINAND_OP_VARIANTS(read_cache_variants,
 		SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
 		SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
 		SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
 		SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));

 static SPINAND_OP_VARIANTS(read_cache_variants2,
 		SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0),
 		SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
 		SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0),
 		SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
 		SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
 		SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));

 static SPINAND_OP_VARIANTS(write_cache_variants,
 		SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
 		SPINAND_PROG_LOAD(true, 0, NULL, 0));

 static SPINAND_OP_VARIANTS(update_cache_variants,
 		SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
 		SPINAND_PROG_LOAD(false, 0, NULL, 0));

 static int mx35lfxge4ab_ooblayout_ecc(struct mtd_info *mtd, int section,
 				      struct mtd_oob_region *region)
 {
 	return -ERANGE;
 }

 static int mx35lfxge4ab_ooblayout_free(struct mtd_info *mtd, int section,
 				       struct mtd_oob_region *region)
 {
 	if (section)
 		return -ERANGE;

 	region->offset = 2;
 	region->length = mtd->oobsize - 2;

 	return 0;
 }

 static const struct mtd_ooblayout_ops mx35lfxge4ab_ooblayout = {
 	.ecc = mx35lfxge4ab_ooblayout_ecc,
 	.free = mx35lfxge4ab_ooblayout_free,
 };

 static int mx35lf1ge4ab_get_eccsr(struct spinand_device *spinand, u8 *eccsr)
 {
 	struct spi_mem_op op = SPI_MEM_OP(SPI_MEM_OP_CMD(0x7c, 1),
 					  SPI_MEM_OP_NO_ADDR,
 					  SPI_MEM_OP_DUMMY(1, 1),
 					  SPI_MEM_OP_DATA_IN(1, eccsr, 1));

 	int ret = spi_mem_exec_op(spinand->spimem, &op);
 	if (ret)
 		return ret;

 	*eccsr &= MACRONIX_ECCSR_MASK;
 	return 0;
 }

 static int mx35lf1ge4ab_ecc_get_status(struct spinand_device *spinand,
 				       u8 status)
 {
 	struct nand_device *nand = spinand_to_nand(spinand);
 	u8 eccsr;

 	switch (status & STATUS_ECC_MASK) {
 	case STATUS_ECC_NO_BITFLIPS:
 		return 0;

 	case STATUS_ECC_UNCOR_ERROR:
 		return -EBADMSG;

 	case STATUS_ECC_HAS_BITFLIPS:
 		/*
 		 * Let's try to retrieve the real maximum number of bitflips
 		 * in order to avoid forcing the wear-leveling layer to move
 		 * data around if it's not necessary.
 		 */
 		if (mx35lf1ge4ab_get_eccsr(spinand, &eccsr))
 			return nand->eccreq.strength;

 		if (WARN_ON(eccsr > nand->eccreq.strength || !eccsr))
 			return nand->eccreq.strength;

 		return eccsr;

 	default:
 		break;
 	}

 	return -EINVAL;
 }

 static int mx35ufxge4ax_ooblayout_ecc(struct mtd_info *mtd, int section,
 					struct mtd_oob_region *region)
 {
 	if (section > 3)
 		return -ERANGE;

 	region->offset = (16 * section) + 8;
 	region->length = 8;

 	return 0;
 }

 static int mx35ufxge4ax_ooblayout_free(struct mtd_info *mtd, int section,
 					struct mtd_oob_region *region)
 {
 	if (section > 3)
 		return -ERANGE;

 	region->offset = (16 * section) + 2;
 	region->length = 6;

 	return 0;
 }

 static const struct mtd_ooblayout_ops mx35ufxge4ax_ooblayout = {
 	.ecc = mx35ufxge4ax_ooblayout_ecc,
 	.free = mx35ufxge4ax_ooblayout_free,
 };

 static int mx35ufxge4ad_set_bft(struct spinand_device *spinand, u8 threshold)
 {
 	u8 val, bft;
 	struct spi_mem_op op_rd = SPINAND_GET_FEATURE_OP(0x10, &val);
 	int ret;

 	ret = spi_mem_exec_op(spinand->spimem, &op_rd);
 	if (ret)
 		return ret;

 	bft = (val & 0xf0) >> 4;
 	printk("%s: read BFT=0x%x threshold=%d\n", __func__, val, threshold);

 	if (bft != threshold) {
 		struct spi_mem_op op_wr = SPINAND_SET_FEATURE_OP(0x10, &val);

 		val = threshold << 4;
 		ret = spi_mem_exec_op(spinand->spimem, &op_wr);
 		if (ret)
 			return ret;

 		printk("%s: update BFT=0x%x\n", __func__, val);
 	}

 	return 0;
 }

 static int mx35ufxge4ax_ecc_get_status(struct spinand_device *spinand,
 				       u8 status)
 {
 	struct nand_device *nand = spinand_to_nand(spinand);
 	u8 eccsr;

 	switch (status & STATUS_ECC_MASK) {
 	case STATUS_ECC_NO_BITFLIPS:
 		return 0;

 	case STATUS_ECC_UNCOR_ERROR:
 		return -EBADMSG;

 	default:
 		/*
 		 * Let's try to retrieve the real maximum number of bitflips
 		 * in order to avoid forcing the wear-leveling layer to move
 		 * data around if it's not necessary.
 		 */
 		if (mx35lf1ge4ab_get_eccsr(spinand, &eccsr))
 			return nand->eccreq.strength;

 		if (WARN_ON(eccsr > nand->eccreq.strength || !eccsr))
 			return nand->eccreq.strength;

 		return eccsr;
 	}

 	return -EINVAL;
 }

 static int mx35ufxge4ad_ooblayout_ecc(struct mtd_info *mtd, int section,
 				  struct mtd_oob_region *region)
 {
 	if (section > 3)
 		return -ERANGE;

 	region->offset = (16 * section) + 64;
 	region->length = 16;

 	return 0;
 }

 static int mx35ufxge4ad_ooblayout_free(struct mtd_info *mtd, int section,
 				   struct mtd_oob_region *region)
 {
 	if (section > 3)
 		return -ERANGE;

 	region->offset = (16 * section) + 2;
 	region->length = 14;

 	return 0;
 }

 static const struct mtd_ooblayout_ops mx35ufxge4ad_ooblayout = {
 	.ecc = mx35ufxge4ad_ooblayout_ecc,
 	.free = mx35ufxge4ad_ooblayout_free,
 };

 static const struct spinand_info macronix_spinand_table[] = {
 	SPINAND_INFO("MX35LF1GE4AB", 0x12,
 		     NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
 		     NAND_ECCREQ(4, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
 					      &write_cache_variants,
 					      &update_cache_variants),
 		     SPINAND_HAS_QE_BIT,
 		     SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
 				     mx35lf1ge4ab_ecc_get_status)),
 	SPINAND_INFO("MX35LF2GE4AB", 0x22,
 		     NAND_MEMORG(1, 2048, 64, 64, 2048, 40, 2, 1, 1),
 		     NAND_ECCREQ(4, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
 					      &write_cache_variants,
 					      &update_cache_variants),
 		     SPINAND_HAS_QE_BIT,
 		     SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, NULL)),
 	SPINAND_INFO("MX35UF1GE4AC", 0x92,
 		     NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
 		     NAND_ECCREQ(4, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants2,
 					      &write_cache_variants,
 					      &update_cache_variants),
 		     SPINAND_HAS_QE_BIT | SPINAND_NEED_SET_BFT,
 		     SPINAND_ECCINFO(&mx35ufxge4ax_ooblayout,
 				     mx35ufxge4ax_ecc_get_status)),
 	SPINAND_INFO("MX35UF2GE4AC", 0xA2,
 		     NAND_MEMORG(1, 2048, 64, 64, 2048, 40, 2, 1, 1),
 		     NAND_ECCREQ(4, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants2,
 					      &write_cache_variants,
 					      &update_cache_variants),
 		     SPINAND_HAS_QE_BIT | SPINAND_NEED_SET_BFT,
 		     SPINAND_ECCINFO(&mx35ufxge4ax_ooblayout,
 				     mx35ufxge4ax_ecc_get_status)),
 	SPINAND_INFO("MX35UF1GE4AD", 0x96,
 		     NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
 		     NAND_ECCREQ(4, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants2,
 					      &write_cache_variants,
 					      &update_cache_variants),
 		     SPINAND_HAS_QE_BIT | SPINAND_NEED_SET_BFT,
 		     SPINAND_ECCINFO(&mx35ufxge4ad_ooblayout,
 				     mx35ufxge4ax_ecc_get_status)),
 	SPINAND_INFO("MX35UF2GE4AD", 0xA6,
 		     NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 2, 1, 1),
 		     NAND_ECCREQ(8, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants2,
 					      &write_cache_variants,
 					      &update_cache_variants),
 		     SPINAND_HAS_QE_BIT | SPINAND_NEED_SET_BFT,
 		     SPINAND_ECCINFO(&mx35ufxge4ad_ooblayout,
 				     mx35ufxge4ax_ecc_get_status)),
 };

 static int macronix_spinand_detect(struct spinand_device *spinand)
 {
 	u8 *id = spinand->id.data;
 	int ret;

 	/*
 	 * Macronix SPI NAND read ID needs a dummy byte, so the first byte in
 	 * raw_id is garbage.
 	 */
 	if (id[1] != SPINAND_MFR_MACRONIX)
 		return 0;

 	ret = spinand_match_and_init(spinand, macronix_spinand_table,
 				     ARRAY_SIZE(macronix_spinand_table),
 				     id[2]);
 	if (ret)
 		return ret;

 	return 1;
 }

 static int macronix_spinand_init(struct spinand_device *spinand)
 {
 	struct nand_device *nand = spinand_to_nand(spinand);
 	u8 threshold;
 	int ret = 0;

 	if (spinand->flags & SPINAND_NEED_SET_BFT) {
 		threshold = DIV_ROUND_UP(nand->eccreq.strength * 3, 4);
 		threshold = threshold ? threshold : 1;
 		ret = mx35ufxge4ad_set_bft(spinand, threshold);
 	}

 	return ret;
 }
 static const struct spinand_manufacturer_ops macronix_spinand_manuf_ops = {
 	.detect = macronix_spinand_detect,
 	.init = macronix_spinand_init,
 };

 const struct spinand_manufacturer macronix_spinand_manufacturer = {
 	.id = SPINAND_MFR_MACRONIX,
 	.name = "Macronix",
 	.ops = &macronix_spinand_manuf_ops,
 };
	// SPDX-License-Identifier: GPL-2.0
	/*
	* Copyright (c) 2018 Macronix
	*
	* Author: Boris Brezillon <boris.brezillon@bootlin.com>
	*/

	#include <linux/device.h>
	#include <linux/kernel.h>
	#include <linux/mtd/spinand.h>

	#define SPINAND_MFR_MACRONIX 0xC2
	#define MACRONIX_ECCSR_MASK 0x0F

	static SPINAND_OP_VARIANTS(read_cache_variants,
	SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
	SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
	SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
	SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));

	static SPINAND_OP_VARIANTS(read_cache_variants2,
	SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0),
	SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
	SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0),
	SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
	SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
	SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));

	static SPINAND_OP_VARIANTS(write_cache_variants,
	SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
	SPINAND_PROG_LOAD(true, 0, NULL, 0));

	static SPINAND_OP_VARIANTS(update_cache_variants,
	SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
	SPINAND_PROG_LOAD(false, 0, NULL, 0));

	static int mx35lfxge4ab_ooblayout_ecc(struct mtd_info *mtd, int section,
	struct mtd_oob_region *region)
	{
	return -ERANGE;
	}

	static int mx35lfxge4ab_ooblayout_free(struct mtd_info *mtd, int section,
	struct mtd_oob_region *region)
	{
	if (section)
	return -ERANGE;

	region->offset = 2;
	region->length = mtd->oobsize - 2;

	return 0;
	}

	static const struct mtd_ooblayout_ops mx35lfxge4ab_ooblayout = {
	.ecc = mx35lfxge4ab_ooblayout_ecc,
	.free = mx35lfxge4ab_ooblayout_free,
	};

	static int mx35lf1ge4ab_get_eccsr(struct spinand_device spinand, u8 eccsr)
	{
	struct spi_mem_op op = SPI_MEM_OP(SPI_MEM_OP_CMD(0x7c, 1),
	SPI_MEM_OP_NO_ADDR,
	SPI_MEM_OP_DUMMY(1, 1),
	SPI_MEM_OP_DATA_IN(1, eccsr, 1));

	int ret = spi_mem_exec_op(spinand->spimem, &op);
	if (ret)
	return ret;

	*eccsr &= MACRONIX_ECCSR_MASK;
	return 0;
	}

	static int mx35lf1ge4ab_ecc_get_status(struct spinand_device *spinand,
	u8 status)
	{
	struct nand_device *nand = spinand_to_nand(spinand);
	u8 eccsr;

	switch (status & STATUS_ECC_MASK) {
	case STATUS_ECC_NO_BITFLIPS:
	return 0;

	case STATUS_ECC_UNCOR_ERROR:
	return -EBADMSG;

	case STATUS_ECC_HAS_BITFLIPS:
	/*
	* Let's try to retrieve the real maximum number of bitflips
	* in order to avoid forcing the wear-leveling layer to move
	* data around if it's not necessary.
	*/
	if (mx35lf1ge4ab_get_eccsr(spinand, &eccsr))
	return nand->eccreq.strength;

	if (WARN_ON(eccsr > nand->eccreq.strength \|\| !eccsr))
	return nand->eccreq.strength;

	return eccsr;

	default:
	break;
	}

	return -EINVAL;
	}

	static int mx35ufxge4ax_ooblayout_ecc(struct mtd_info *mtd, int section,
	struct mtd_oob_region *region)
	{
	if (section > 3)
	return -ERANGE;

	region->offset = (16 * section) + 8;
	region->length = 8;

	return 0;
	}

	static int mx35ufxge4ax_ooblayout_free(struct mtd_info *mtd, int section,
	struct mtd_oob_region *region)
	{
	if (section > 3)
	return -ERANGE;

	region->offset = (16 * section) + 2;
	region->length = 6;

	return 0;
	}

	static const struct mtd_ooblayout_ops mx35ufxge4ax_ooblayout = {
	.ecc = mx35ufxge4ax_ooblayout_ecc,
	.free = mx35ufxge4ax_ooblayout_free,
	};

	static int mx35ufxge4ad_set_bft(struct spinand_device *spinand, u8 threshold)
	{
	u8 val, bft;
	struct spi_mem_op op_rd = SPINAND_GET_FEATURE_OP(0x10, &val);
	int ret;

	ret = spi_mem_exec_op(spinand->spimem, &op_rd);
	if (ret)
	return ret;

	bft = (val & 0xf0) >> 4;
	printk("%s: read BFT=0x%x threshold=%d\n", __func__, val, threshold);

	if (bft != threshold) {
	struct spi_mem_op op_wr = SPINAND_SET_FEATURE_OP(0x10, &val);

	val = threshold << 4;
	ret = spi_mem_exec_op(spinand->spimem, &op_wr);
	if (ret)
	return ret;

	printk("%s: update BFT=0x%x\n", __func__, val);
	}

	return 0;
	}

	static int mx35ufxge4ax_ecc_get_status(struct spinand_device *spinand,
	u8 status)
	{
	struct nand_device *nand = spinand_to_nand(spinand);
	u8 eccsr;

	switch (status & STATUS_ECC_MASK) {
	case STATUS_ECC_NO_BITFLIPS:
	return 0;

	case STATUS_ECC_UNCOR_ERROR:
	return -EBADMSG;

	default:
	/*
	* Let's try to retrieve the real maximum number of bitflips
	* in order to avoid forcing the wear-leveling layer to move
	* data around if it's not necessary.
	*/
	if (mx35lf1ge4ab_get_eccsr(spinand, &eccsr))
	return nand->eccreq.strength;

	if (WARN_ON(eccsr > nand->eccreq.strength \|\| !eccsr))
	return nand->eccreq.strength;

	return eccsr;
	}

	return -EINVAL;
	}

	static int mx35ufxge4ad_ooblayout_ecc(struct mtd_info *mtd, int section,
	struct mtd_oob_region *region)
	{
	if (section > 3)
	return -ERANGE;

	region->offset = (16 * section) + 64;
	region->length = 16;

	return 0;
	}

	static int mx35ufxge4ad_ooblayout_free(struct mtd_info *mtd, int section,
	struct mtd_oob_region *region)
	{
	if (section > 3)
	return -ERANGE;

	region->offset = (16 * section) + 2;
	region->length = 14;

	return 0;
	}

	static const struct mtd_ooblayout_ops mx35ufxge4ad_ooblayout = {
	.ecc = mx35ufxge4ad_ooblayout_ecc,
	.free = mx35ufxge4ad_ooblayout_free,
	};

	static const struct spinand_info macronix_spinand_table[] = {
	SPINAND_INFO("MX35LF1GE4AB", 0x12,
	NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
	NAND_ECCREQ(4, 512),
	SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
	&write_cache_variants,
	&update_cache_variants),
	SPINAND_HAS_QE_BIT,
	SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
	mx35lf1ge4ab_ecc_get_status)),
	SPINAND_INFO("MX35LF2GE4AB", 0x22,
	NAND_MEMORG(1, 2048, 64, 64, 2048, 40, 2, 1, 1),
	NAND_ECCREQ(4, 512),
	SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
	&write_cache_variants,
	&update_cache_variants),
	SPINAND_HAS_QE_BIT,
	SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, NULL)),
	SPINAND_INFO("MX35UF1GE4AC", 0x92,
	NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
	NAND_ECCREQ(4, 512),
	SPINAND_INFO_OP_VARIANTS(&read_cache_variants2,
	&write_cache_variants,
	&update_cache_variants),
	SPINAND_HAS_QE_BIT \| SPINAND_NEED_SET_BFT,
	SPINAND_ECCINFO(&mx35ufxge4ax_ooblayout,
	mx35ufxge4ax_ecc_get_status)),
	SPINAND_INFO("MX35UF2GE4AC", 0xA2,
	NAND_MEMORG(1, 2048, 64, 64, 2048, 40, 2, 1, 1),
	NAND_ECCREQ(4, 512),
	SPINAND_INFO_OP_VARIANTS(&read_cache_variants2,
	&write_cache_variants,
	&update_cache_variants),
	SPINAND_HAS_QE_BIT \| SPINAND_NEED_SET_BFT,
	SPINAND_ECCINFO(&mx35ufxge4ax_ooblayout,
	mx35ufxge4ax_ecc_get_status)),
	SPINAND_INFO("MX35UF1GE4AD", 0x96,
	NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
	NAND_ECCREQ(4, 512),
	SPINAND_INFO_OP_VARIANTS(&read_cache_variants2,
	&write_cache_variants,
	&update_cache_variants),
	SPINAND_HAS_QE_BIT \| SPINAND_NEED_SET_BFT,
	SPINAND_ECCINFO(&mx35ufxge4ad_ooblayout,
	mx35ufxge4ax_ecc_get_status)),
	SPINAND_INFO("MX35UF2GE4AD", 0xA6,
	NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 2, 1, 1),
	NAND_ECCREQ(8, 512),
	SPINAND_INFO_OP_VARIANTS(&read_cache_variants2,
	&write_cache_variants,
	&update_cache_variants),
	SPINAND_HAS_QE_BIT \| SPINAND_NEED_SET_BFT,
	SPINAND_ECCINFO(&mx35ufxge4ad_ooblayout,
	mx35ufxge4ax_ecc_get_status)),
	};

	static int macronix_spinand_detect(struct spinand_device *spinand)
	{
	u8 *id = spinand->id.data;
	int ret;

	/*
	* Macronix SPI NAND read ID needs a dummy byte, so the first byte in
	* raw_id is garbage.
	*/
	if (id[1] != SPINAND_MFR_MACRONIX)
	return 0;

	ret = spinand_match_and_init(spinand, macronix_spinand_table,
	ARRAY_SIZE(macronix_spinand_table),
	id[2]);
	if (ret)
	return ret;

	return 1;
	}

	static int macronix_spinand_init(struct spinand_device *spinand)
	{
	struct nand_device *nand = spinand_to_nand(spinand);
	u8 threshold;
	int ret = 0;

	if (spinand->flags & SPINAND_NEED_SET_BFT) {
	threshold = DIV_ROUND_UP(nand->eccreq.strength * 3, 4);
	threshold = threshold ? threshold : 1;
	ret = mx35ufxge4ad_set_bft(spinand, threshold);
	}

	return ret;
	}
	static const struct spinand_manufacturer_ops macronix_spinand_manuf_ops = {
	.detect = macronix_spinand_detect,
	.init = macronix_spinand_init,
	};

	const struct spinand_manufacturer macronix_spinand_manufacturer = {
	.id = SPINAND_MFR_MACRONIX,
	.name = "Macronix",
	.ops = &macronix_spinand_manuf_ops,
	};