| /****************************************************************************** | |
| * | |
| * (C)Copyright 2013 Marvell. All Rights Reserved. | |
| * | |
| * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MARVELL. | |
| * The copyright notice above does not evidence any actual or intended | |
| * publication of such source code. | |
| * This Module contains Proprietary Information of Marvell and should be | |
| * treated as Confidential. | |
| * The information in this file is provided for the exclusive use of the | |
| * licensees of Marvell. | |
| * Such users have the right to use, modify, and incorporate this code into | |
| * products for purposes authorized by the license agreement provided they | |
| * include this notice and the associated copyright notice with any such | |
| * product. | |
| * The information in this file is provided "AS IS" without warranty. | |
| * | |
| ******************************************************************************/ | |
| #ifndef _USB2_MAIN_H_ | |
| #define _USB2_MAIN_H_ | |
| #include "Typedef.h" | |
| #include "usbdefs.h" | |
| #define USB2D_CTRL_RESET_TIME_MS 0x20 | |
| #define USB2D_SHUTDOWN_TIME_MS 0x20 | |
| #define MAX_USB2_dTD_XFER_SIZE_B 16*1024 | |
| // Interrupt / Status Register Masks | |
| #define USB2D_INT_STS_INT BIT0 | |
| #define USB2D_INT_STS_ERR BIT1 | |
| #define USB2D_INT_STS_PORT_CHANGE BIT2 | |
| #define USB2D_INT_STS_RESET BIT6 | |
| #define USB2D_INT_STS_SOF BIT7 | |
| #define USB2D_INT_STS_SUSPEND BIT8 | |
| #define USB2D_INT_STS_HALTED BIT12 | |
| //dTD Token | |
| typedef struct | |
| { | |
| UINT_T Status : 8; //Status | |
| UINT_T Reserved0 : 2; | |
| UINT_T MultO : 2; //Multiple Override, only used for ISOCHRONOUS | |
| UINT_T Reserved1 : 3; | |
| UINT_T IOC : 1; //Interrupt On Completion | |
| UINT_T Size : 15; //Transfer size for this dTD | |
| UINT_T Reserved2 : 1; | |
| } dTDTOKEN_T, *P_dTDTOKEN_T; | |
| //data Transfer Descriptor(dTD) | |
| typedef struct | |
| { | |
| UINT_T pNext_dTD; | |
| dTDTOKEN_T dTDToken; | |
| UINT_T BuffPtr[5]; //pointers must be 4k aligned except for the 1st one | |
| UINT_T allocated; //not used by USB driver, used by software to track dTDs | |
| } dTD_T, *P_dTD_T; | |
| //Endpoint Capabilies | |
| typedef struct | |
| { | |
| UINT_T Reserved0 : 15; // | |
| UINT_T IOS : 1; //Interrupt On Setup | |
| UINT_T MaxPacketLen : 11; //Max packet length: hardcapped at 1KB | |
| UINT_T Reserved1 : 2; | |
| UINT_T ZLT : 1; //Zero Length Termination bit | |
| UINT_T Mult : 2; //Num Transactions | |
| } EP_CAPABILITIES_T, *P_EP_CAPABILITIES_T; | |
| //Endpoint Queue Head Structure (must be padded to 64 Bytes) | |
| #pragma pack (4) | |
| typedef struct | |
| { | |
| EP_CAPABILITIES_T EP_Caps; //info for this Queue Head | |
| UINT_T pCurrent_dTD; // pointer to current dTD | |
| // in 64 bit system, this is 4 bytes to match 32bit usb control | |
| // but we keep the same name to 32bit case | |
| dTD_T dTD_Overlay; //the dTD that resides in this struct | |
| UINT_T Setup[2]; //8 bytes to capture setup packet info | |
| UINT_T Reserved; //padding to align this structure to 64 bytes | |
| UINT_T tot_size; //not used by USB driver, used by software to xfer info | |
| UINT_T buffer; //not used by USB driver, used by software to xfer info | |
| UINT_T initial_dTD; //not used by USB driver, used by software to track dTD chain | |
| } dQH_T, *P_dQH_T; | |
| #pragma pack () | |
| //USB2 Register Layout | |
| typedef struct | |
| { | |
| VUINT_T RESERVED0[0x50]; //0x0 -> 0x13C | |
| VUINT_T USB_CMD; //0x140 | |
| VUINT_T USB_STS; //0x144 | |
| VUINT_T USB_INTR; //0x148 | |
| VUINT_T USB_FRINDEX; //0x14C | |
| VUINT_T RESERVED1; //0x150 | |
| VUINT_T DEVICE_ADDR; //0x154 | |
| VUINT_T EP_LIST_ADDR; //0x158 | |
| VUINT_T RESERVED2; //0x15C | |
| VUINT_T BURSTSIZE; //0x160 | |
| VUINT_T RESERVED3[5]; //0x164 -> 0x174 | |
| VUINT_T EPNAK; //0x178 | |
| VUINT_T EPNAKEN; //0x17C | |
| VUINT_T RESERVED4; //0x180 | |
| VUINT_T PORTSC; //0x184 | |
| VUINT_T RESERVED5[7]; //0x188 | |
| VUINT_T OTGSC; //0x1A4 | |
| VUINT_T USB_MODE; //0x1A8 | |
| VUINT_T ENDPT_SETUP_STAT; //0x1AC | |
| VUINT_T ENDPTPRIME; //0x1B0 | |
| VUINT_T ENDPTFLUSH; //0x1B4 | |
| VUINT_T ENDPTSTATUS; //0x1B8 | |
| VUINT_T ENDPTCOMPLETE; //0x1BC | |
| VUINT_T ENDPTCTRLX[16]; //0x1C0 | |
| } USB2Device_Regs_T, *P_USB2Device_Regs_T; | |
| //Device 'Object' | |
| typedef struct | |
| { | |
| P_dQH_T pdQHHead; //pointer to the first Queue Head (EP0 In) for this device | |
| P_USB2Device_Regs_T pUSBRegs; //pointer to the USB registers for this device | |
| UINT_T InterruptNum; //interrupt number for this device | |
| UINT_T BufferSpace[1]; //space for initial EP2 priming (before getting to Protocol manager): for preamble | |
| } DC_Properties_T, *P_DC_Properties_T; | |
| //Prototypes | |
| UINT_T USB2D_Initialize(UINT_T base_address, UINT_T int_number); | |
| void USB2D_Shutdown(UINT intnum); | |
| void USB2D_ISR(UINT_T intnum); | |
| void USB2D_Controller_Setup(P_DC_Properties_T pDCProps); | |
| void USB2D_Endpoint_Setup(P_DC_Properties_T pDCProps, XLLP_USB_ENDPOINT_ID_T ep_num, XLLP_USB_EP_DIR_T direction, XLLP_USB_EP_TYPE_T type); | |
| void USB2D_Reset_Int(P_DC_Properties_T pDCProps); | |
| void USB2D_Setup_Int(P_DC_Properties_T pDCProps); | |
| void USB2D_PM_Call(P_DC_Properties_T pDCProps); | |
| void USB2D_Complete_Int(P_DC_Properties_T pDCProps); | |
| void USB2D_EndpointTransmit(P_DC_Properties_T pDCProps, XLLP_USB_ENDPOINT_ID_T ep_num, XLLP_USB_EP_DIR_T direction, UINT_T buffer, UINT_T size); | |
| void USB2D_SendWrapper(UINT_T *buffer, UINT_T size, void * pUSBAPI); | |
| void USB2D_RecieveWrapper(UINT_T *buffer, UINT_T size, void * pUSBAPI); | |
| #endif | |