| /****************************************************************************** |
| * |
| * (C)Copyright 2005 - 2012 Marvell. All Rights Reserved. |
| * |
| * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MARVELL. |
| * The copyright notice above does not evidence any actual or intended |
| * publication of such source code. |
| * This Module contains Proprietary Information of Marvell and should be |
| * treated as Confidential. |
| * The information in this file is provided for the exclusive use of the |
| * licensees of Marvell. |
| * Such users have the right to use, modify, and incorporate this code into |
| * products for purposes authorized by the license agreement provided they |
| * include this notice and the associated copyright notice with any such |
| * product. |
| * The information in this file is provided "AS IS" without warranty. |
| * |
| ******************************************************************************/ |
| #ifndef __SPI_NOR_H__ |
| #define __SPI_NOR_H__ |
| |
| #include "Typedef.h" |
| #include "Flash.h" |
| #include "SSP.h" |
| #include "predefines.h" |
| |
| /* |
| * SPI Command Set |
| */ |
| #define SPI_CMD_JEDEC_ID 0x9F |
| #define SPI_CMD_RELEASE_POWER_DOWN 0xAB |
| #define SPI_CMD_READ_STATUS 0x05 |
| #define SPI_CMD_WRITE_ENABLE 0x06 |
| #define SPI_CMD_WRITE_STATUS_REG 0x01 |
| #define SPI_CMD_PROGRAM 0x02 |
| #define SPI_CMD_READ 0x03 |
| #define SPI_CMD_SECTOR_ERASE 0xd8 |
| #define SPI_CMD_CHIP_ERASE 0xc7 |
| |
| #define WRTIE_ENABLE_LATCH_BIT BIT1 |
| |
| typedef enum |
| { |
| SPINOR_4bytes_Status_Register = 0, |
| SPINOR_write_enable_Status_Register = 1 |
| }SPINOR_Register; |
| |
| |
| // Specific Manufactorer ID's |
| typedef enum { |
| MICRON_ID = 0x2C, |
| MACRONIX_ID = 0xC2, |
| GIGADEVICE_ID = 0xC8, |
| SPANSION_ID = 0x01 |
| }SPINOR_MANUFACTURER_ID; |
| |
| |
| typedef struct{ |
| unsigned char large_capacity; // 32MB? |
| unsigned char enable_4bytes; // enable 4bytes mode for the second 16MB memory |
| unsigned char write_enable_4enable_4bytes; // send write enable cmd before enable 4bytes mode |
| unsigned char read_4bytes_cmd; // read cmd |
| unsigned char write_4bytes_cmd; // write cmd |
| unsigned char erase_4bytes_cmd; // erase cmd |
| unsigned char read_4bytes_status_cmd; // read status cmd for 4bytes enabled |
| unsigned char spi_4bytes_enabled_bit; // 4bytes mode enabled |
| } SPINOR_T, *P_SPINOR_T; |
| |
| |
| UINT_T InitializeSPIDevice(UINT8_T FlashNum, FlashBootType_T FlashBootType, UINT8_T* P_DefaultPartitionNum); |
| UINT_T SPINOR_Read(UINT_T FlashOffset, UINT_T Buffer, UINT_T Size); |
| UINT_T SPINOR_Write(UINT_T Address, UINT_T Buffer, UINT_T Size); |
| UINT_T SPINOR_Erase(UINT_T Address, UINT_T Size); |
| UINT_T SPINOR_Wipe(void); |
| void SPINOR_Reset(void); |
| void SPINOR_ReadStatus(UINT_T Wait); |
| void SPINOR_WriteEnable(void); |
| void SPINOR_WriteStatus(unsigned char status); |
| void SPINOR_Enable4BytesMode(void); |
| void SPINOR_Disable4BytesMode(void); |
| void SPINOR_Protect_Blocks(void); |
| void SPINOR_UnProtectBlocks(void); |
| void SPINOR_ResetEnable(void); |
| void SPINOR_ResetMemory(void); |
| |
| #endif |
| |
| |