| #ifndef _TE200_CIPHER_H_ |
| #define _TE200_CIPHER_H_ |
| |
| #include <common.h> |
| |
| #define TE200_BASE 0xD4220000 |
| #define TE200_CLOCK_CTRL (0x0000 + TE200_BASE) |
| #define TE200_STATUS (0x0100 + TE200_BASE) |
| |
| /* OTP registers */ |
| #define TE200_OTP_DUMMY_CFG (0x0428 + TE200_BASE) |
| |
| /* secure sca registers */ |
| #define TE200_SSCA_QUEUE (0x3200 + TE200_BASE) |
| #define TE200_SSCA_CTRL (0x3204 + TE200_BASE) |
| #define TE200_SSCA_STAT (0x3208 + TE200_BASE) |
| #define TE200_SSCA_INTR_STAT (0x320C + TE200_BASE) |
| #define TE200_SSCA_INTR_MSK (0x3210 + TE200_BASE) |
| |
| #define SCA_CLK_EN (1 << 1) |
| #define OTP_CLK_EN (1 << 3) |
| |
| /* sca queue register bits */ |
| #define SCA_INIT_CMD (0x80 << 24) |
| #define SCA_PROCESS_CMD (0x40 << 24) |
| #define SCA_FINISH_CMD (0x20 << 24) |
| |
| /* sca intr msk register */ |
| #define WM_INTR_MSK (1 << 4) |
| #define BUS_RROR_MSK (1 << 3) |
| #define INVALID_KEY_MSK (1 << 2) |
| #define INVALID_CMD_MSK (1 << 1) |
| #define CMD_INIR_MSK (1 << 0) |
| |
| /* sca queue registers bits */ |
| #define SCA_INTER_TRIGGERD (1 << 0) |
| |
| /* sca ctrl registers bits */ |
| #define SCA_RUN (1 << 0) |
| |
| /* sca intr stat registers bits */ |
| #define SCA_WM_INTR (1 << 4) |
| #define SCA_BUS_ERROR (1 << 3) |
| #define SCA_INVALID_KEY (1 << 2) |
| #define SCA_INVALID_CMD (1 << 1) |
| #define SCA_CMD_INTR (1 << 0) |
| |
| /* TE200_HASH_QUEUE: sca init */ |
| #define SCA_MODEL_KEY (~(1 << 22)) |
| #define SCA_DEVICE_ROOT_KEY (1 << 22) |
| #define SCA_EXTERNAL_KEY (2 << 22) |
| |
| #define SCA_KEY_128_BITS (~(1 << 20)) |
| #define SCA_KEY_192_BITS (1 << 20) |
| #define SCA_KEY_256_BITS (2 << 20) |
| |
| #define SCA_NORMAL_AES (~(1 << 19)) |
| #define SCA_SM4 (1 << 19) |
| #define SCA_KEY_IS_ADDR (1 << 18) |
| #define SCA_SET_IV (1 << 15) |
| #define SCA_SET_IV_ADDR (1 << 14) |
| |
| #define SCA_MODE_ECB (~(1 << 4)) |
| #define SCA_MODE_CTR (1 << 4) |
| #define SCA_MODE_CBC (2 << 4) |
| #define SCA_MODE_CBC_MAC (3 << 4) |
| #define SCA_MODE_CMAC (4 << 4) |
| #define SCA_MODE_GHASH (5 << 4) |
| |
| #define AES_CLK_RES_CTRL (0x68) |
| |
| /* TE200_HASH_QUEUE: sca process */ |
| #define SCA_LAST_ONE_SESSION (1 << 6) |
| #define SCA_ENCRYPTION (1 << 5) |
| |
| enum SCA_MODE { |
| NORMAL_AES = 0, |
| SM4 |
| }; |
| |
| enum SCA_CIPHER_ALG { |
| ECB = 0, |
| CTR, |
| CBC, |
| }; |
| |
| struct sca_data { |
| int encrypt; |
| int alg_type; |
| int mode; |
| }; |
| |
| int aes_ecb_encrypt_te200(uint8_t *key, uint32_t key_len, bool use_rkek, |
| void *in, void *out, uint32_t size); |
| int aes_ecb_decrypt_te200(uint8_t *key, uint32_t key_len, bool use_rkek, |
| void *in, void *out, uint32_t size); |
| int aes_cbc_encrypt_te200(uint8_t *iv, uint8_t *key, uint32_t key_len, |
| bool use_rkek, void *in, void *out, uint32_t size); |
| int aes_cbc_decrypt_te200(uint8_t *iv, uint8_t *key, uint32_t key_len, |
| bool use_rkek, void *in, void *out, uint32_t size); |
| #endif |