| /* |
| * Copyright (C) 2014 Marvell International Ltd. |
| * Fenghang Yin <yinfh@marvell.com> |
| * |
| * SPDX-License-Identifier: GPL-2.0+ |
| */ |
| |
| #ifndef __88PM830_H_ |
| #define __88PM830_H_ |
| |
| #include <power/marvell88pm_pmic.h> |
| |
| /* 88pm830 registers */ |
| enum { |
| PM830_REG_PMIC_ID = 0x0, |
| PM830_REG_STATUS = 0x1, |
| PM830_REG_INT1 = 0x4, |
| PM830_REG_INT2 = 0x5, |
| PM830_REG_INT3 = 0x6, |
| PM830_REG_INT1MSK = 0x8, |
| PM830_REG_INT2MSK = 0x9, |
| PM830_REG_INT3MSK = 0xa, |
| PM830_REG_MISC1 = 0x10, |
| PM830_REG_FG_CTRL1 = 0x24, |
| PM830_REG_FG_CTRL2 = 0x32, |
| PM830_REG_CHG_CTRL1 = 0x3c, |
| PM830_REG_CHG_CTRL2 = 0x3e, |
| PM830_REG_CHG_CTRL3 = 0x3f, |
| PM830_REG_CHG_CTRL4 = 0x41, |
| PM830_REG_CHG_CTRL5 = 0x42, |
| PM830_REG_CHG_CTRL6 = 0x43, |
| PM830_REG_CHG_CTRL7 = 0x44, |
| PM830_REG_CHG_CTRL8 = 0x46, |
| PM830_REG_CHG_CTRL9 = 0x4f, |
| PM830_REG_CHG_FLAG = 0x50, |
| PM830_REG_CHG_CTRL10 = 0x51, |
| PM830_REG_MPPT_CTRL1 = 0x54, |
| PM830_REG_MPPT_CTRL2 = 0x55, |
| PM830_REG_CHG_STATUS1 = 0x57, |
| PM830_REG_CHG_STATUS2 = 0x58, |
| PM830_REG_MEAS_EN = 0x6A, |
| PM830_REG_CHG_BAT_DET = 0x6e, |
| PM830_REG_BIAS_ENA = 0x6f, |
| PM830_REG_BIAS = 0x70, |
| PM830_REG_VBAT_VAL1 = 0x8a, |
| PM830_REG_VBAT_VAL2 = 0x8b, |
| PM830_REG_MEAS1 = 0x94, |
| PM830_REG_MEAS2 = 0x95, |
| PM830_REG_VBAT_AVG1 = 0xba, |
| PM830_REG_NUM_OF_REGS = 0xc6, |
| }; |
| |
| enum { |
| PM830_GPADC_VBAT, |
| PM830_GPADC_VSYS, |
| PM830_GPADC_VCHG, |
| PM830_GPADC_VPWR, |
| PM830_GPADC_GPADC0, |
| PM830_GPADC_GPADC1, |
| }; |
| |
| #define PM830_A1_VERSION 0x9 |
| #define PM830_B0_VERSION 0x10 |
| #define PM830_B1_VERSION 0x11 |
| #define PM830_B2_VERSION 0x12 |
| |
| #define PM830_BAT_PRESENT (1 << 1) |
| #define PM830_CHG_PRESENT (1 << 0) |
| #define PM830_ICHG_FAST_MASK (0xf) |
| #define PM830_CHG_STAT_POWER_UP (0 << 5) |
| #define PM830_CHG_STAT_PRE_REG (2 << 5) |
| #define PM830_CHG_STAT_PRE_CHG (3 << 5) |
| #define PM830_CHG_STAT_FAST_CHG (4 << 5) |
| #define PM830_CHG_STAT_SUPPL (5 << 5) |
| #define PM830_CHG_STAT_BATT_PWR (6 << 5) |
| #define PM830_CHG_STAT_BOOST (7 << 5) |
| |
| #define PM830_CHG_ENABLE (1 << 0) |
| #define PM830_BAT_SHRT (1 << 4) |
| /* vbat_voltage = (vbat * 5.6) >> 12, if vbat_voltage = 2.2V, vbat should be 0x649. */ |
| #define PM830_VBAT_2V2 (0x649) |
| |
| #define PM830_BAT_SHRT_EN (1 << 3) |
| #define PM830_BAT_DET_EN (1 << 5) |
| |
| #define PM830_GPADC0_BIAS_EN (1 << 4) |
| #define PM830_GPADC0_MEAS_EN (1 << 5) |
| #define PM830_GPADC0_GP_BIAS_OUT (1 << 6) |
| |
| #define BIAS_GP0_MASK (0xF) |
| #define BIAS_GP0_SET(x) ((x - 1) / 5) |
| |
| #define CHARGER_MIN_CURRENT 200 |
| #define CHARGER_MAX_CURRENT 2000 |
| |
| #define PM830_I2C_ADDR 0x68 |
| |
| |
| #define MARVELL_PMIC_CHARGE "88PM830_CHARGE" |
| #define MARVELL_PMIC_FG "88PM830_FG" |
| #define MARVELL_PMIC_BATT "88PM830_BATT" |
| |
| /* preregulator and charger register */ |
| #define PM830_CHG_CTRL1 (0x3c) |
| #define VBUS_BOOSTER_EN (1 << 7) |
| #define BATT_TEMP_MONITOR_EN (1 << 4) |
| #define CHG_START (1 << 0) |
| |
| #define PM830_BSUP_CTRL (0x3d) |
| #define SMTH_EN (1 << 7) |
| #define SMTH_SET_MASK (0x7 << 4) |
| #define BYPASS_SMTH_EN (0x1 << 3) |
| #define OC_OUT_EN (0x1 << 2) |
| #define OC_OUT_SET (0x3 << 0) |
| |
| #define PM830_BAT_CTRL (0x3e) |
| #define BAT_REM_UV_EN (0x1 << 7) |
| #define BAT_SHRT_SET_2 (0x0 << 4) |
| #define BAT_SHRT_SET_2_8 (0x1 << 4) |
| #define BAT_SHRT_SET_2_9 (0x2 << 4) |
| #define BAT_SHRT_SET_3 (0x3 << 4) |
| #define BAT_SHRT_SET_MASK (0x3 << 4) |
| #define BAT_SHRT_EN (0x1 << 3) |
| #define OV_BAT_SET_OFFSET (1) |
| #define OV_VBAT_EN (0x1 << 0) |
| #define SUPPL_PRE_DIS_MASK (0x1 << 6) |
| #define SUPPL_PRE_DIS_SET(x) ((x) << 6) |
| |
| #define PM830_BAT_CTRL2 (0x3f) |
| #define PM830_BAT_PRTY_EN (0x1 << 1) |
| |
| #define PM830_CHG_CTRL2 (0x41) |
| #define VBAT_PRE_TERM_MASK (0x3 << 6) |
| #define VBAT_PRE_TERM_OFFSET (6) |
| #define ICHG_PRE_SET_MASK (0x1f << 0) |
| #define ICHG_PRE_SET_OFFSET (0) |
| |
| #define PM830_CHG_CTRL3 (0x42) |
| #define ICHG_FAST_TERM_MASK (0x7 << 5) |
| #define ICHG_FAST_TERM_OFFSET (5) |
| #define ICHG_FAST_SET_MASK (0xf << 0) |
| #define ICHG_FAST_SET_OFFSET (0) |
| /* for B0 revision and above */ |
| #define ICHG_FAST_TERM_10MA (0x0) |
| #define ICHG_FAST_TERM_20MA (0x1) |
| #define ICHG_FAST_TERM_40MA (0x2) |
| #define ICHG_FAST_TERM_60MA (0x3) |
| #define ICHG_FAST_TERM_100MA (0x4) |
| #define ICHG_FAST_TERM_150MA (0x5) |
| #define ICHG_FAST_TERM_200MA (0x6) |
| #define ICHG_FAST_TERM_300MA (0x7) |
| |
| #define PM830_CHG_CTRL4 (0x43) |
| #define FAST_TERM_NUM(x) ((x) << 6) |
| #define VBAT_FAST_SET_MASK_A1 (0x1f << 0) |
| #define VBAT_FAST_SET_MASK (0x3f << 0) |
| #define VBAT_FAST_SET_OFFSET (0) |
| |
| |
| #define PM830_CHG_CTRL5 (0x44) |
| #define FASTCHG_TIMEOUT_MASK (0x7 << 4) |
| #define FASTCHG_TIMEOUT_SET(x) ((x - 1) << 4) |
| #define PRECHG_TIMEOUT_MASK (0x7 << 0) |
| #define PRECHG_TIMEOUT_SET(x) (((x - 16) >> 3)) |
| |
| #define PM830_CHG_CTRL6 (0x45) |
| #define VSYS_PREREG_SET(x) (((x - 3400) / 50) - 1) |
| |
| #define PM830_CHG_CTRL7 (0x46) |
| #define PM830_CHG_ILIM_10 (0x4) |
| #define PM830_CHG_ILIM_OFFSET (4) |
| #define PM830_CHG_ILIM_MASK (0x7) |
| #define PM830_CHG_CTRL8 (0x47) |
| #define PM830_CHG_CTRL9 (0x48) |
| #define PM830_CHG_CTRL10 (0x49) |
| #define PM830_CHG_CTRL11 (0x4a) |
| #define PM830_CHG_CTRL12 (0x4b) |
| #define PM830_CHG_CTRL13 (0x4c) |
| |
| #define PM830_CHG_STATUS1_A1 (0x4d) |
| /* B0 change: charger status move to 0x57, 0x58 */ |
| #define PM830_CHG_STATUS1 (0x57) |
| #define PM830_CHG_STATUS4 (0x58) |
| #define PM830_FAULT_VBAT_SHORT (0x01 << 0) |
| #define PM830_FAULT_OV_VBAT (0x01 << 1) |
| #define PM830_FAULT_BATTEMP_NOK (0x01 << 2) |
| #define PM830_FAULT_VPWR_SHORT (0x01 << 3) |
| #define PM830_FAULT_CHG_REMOVAL (0x01 << 4) |
| #define PM830_FAULT_BAT_REMOVAL (0x01 << 5) |
| #define PM830_FAULT_CHG_TIMEOUT (0x01 << 6) |
| #define PM830_FAULT_OV_TEMP_INT (0x01 << 7) |
| #define PM830_FAULT_CHGWDG_EXPIRED (0x01 << 8) |
| #define PM830_FAULT_PRE_SUPPL_STOP (0x01 << 9) |
| |
| #define PM830_CHG_CTRL14 (0x4e) |
| #define PM830_CHG_CTRL15 (0x4f) |
| #define PM830_WDG_MASK (0x1 << 4) |
| #define PM830_WDG_SET(x) ((x) << 4) |
| |
| #define PM830_CHG_STATUS2 (0x50) |
| #define PM830_SMTH (1 << 3) |
| #define PM830_VBAT_SHRT (1 << 4) |
| |
| #define PM830_CHG_STATUS3 (0x51) |
| |
| #define PM830_CHG_CTRL16 (0x52) |
| #define PM830_CHG_CTRL17 (0x53) |
| #define PM830_CHG_CTRL18 (0x54) |
| #define PM830_CHG_MPPT_BIDIR_EN (0x1 << 4) |
| #define PM830_CHG_CTRL19 (0x55) |
| #define PM830_CHG_CTRL20 (0x56) |
| |
| /* bit definitions of GPADC Bias Current 1 Register */ |
| #define GP0_BIAS_SET (5) |
| |
| /* GPADC0 Bias Current value in uA unit */ |
| #define GP0_BIAS_SET_UA ((GP0_BIAS_SET) * 5 + 1) |
| |
| /* GPADC */ |
| #define PM830_GPADC_MEAS_EN (0x6A) |
| #define PM830_CFOUT_MEAS_EN (1 << 7) |
| #define PM830_GPADC1_MEAS_EN (1 << 6) |
| #define PM830_GPADC0_MEAS_EN (1 << 5) |
| #define PM830_ITEMP_MEAS_EN (1 << 4) |
| #define PM830_VPWR_MEAS_EN (1 << 3) |
| #define PM830_VCHG_MEAS_EN (1 << 2) |
| #define PM830_VSYS_MEAS_EN (1 << 1) |
| #define PM830_VBAT_MEAS_EN (1 << 0) |
| |
| #define PM830_GPADC_CONFIG1 (0x6C) |
| #define PM830_GPADC_SLOW_MODE(x) (x << 3) |
| #define PM830_GPADC_GPFSM_EN (1 << 0) |
| |
| #define PM830_GPADC_MEASURE_OFF1 (0x6D) |
| #define PM830_GPADC_CONFIG2 (0x6E) |
| #define PM830_BD_GP_SEL_MASK (1 << 6) |
| #define PM830_BD_GP_SEL(x) (x << 6) |
| #define PM830_BD_EN (1 << 5) |
| #define PM830_BD_PREBIAS (1 << 4) |
| |
| #define PM830_GPADC_BIAS_ENA (0x6F) |
| #define PM830_GPADC_GP_BIAS_OUT(x) (x << 6) |
| #define PM830_GPADC_GP_BIAS_EN(x) (x << 4) |
| #define PM830_GPADC_BIAS0 (0x70) |
| #define BIAS_GP0_MASK (0xF) |
| #define BIAS_GP0_SET(x) ((x - 1) / 5) |
| |
| #define PM830_GPADC_BIAS1 (0x71) |
| #define GP_BIAS_SET(x) (x << 0) |
| #define GP_PREBIAS(x) (x << 4) |
| #define PM830_GP_BIAS_MASK (0xf << 0) |
| |
| #define GP_BIAS_SET(x) (x << 0) |
| #define GP_PREBIAS(x) (x << 4) |
| |
| #define PM830_VBAT_LOW_TH (0x76) |
| #define PM830_GPADC0_LOW_TH (0x7B) |
| #define PM830_GPADC1_LOW_TH (0x7C) |
| #define PM830_VBAT_UPP_TH (0x80) |
| #define PM830_GPADC0_UPP_TH (0x85) |
| #define PM830_GPADC1_UPP_TH (0x86) |
| #define PM830_VCHG_MEAS1 (0x8E) |
| #define PM830_ITEMP_HI (0x92) |
| #define PM830_ITEMP_LO (0x93) |
| #define PM830_GPADC0_MEAS1 (0x94) |
| #define PM830_GPADC0_MEAS2 (0x95) |
| #define PM830_GPADC1_MEAS1 (0x96) |
| #define PM830_GPADC1_MEAS2 (0x97) |
| #define PM830_GPADC_VBAT_AVG (0xBA) |
| #define PM830_GPADC_VCHG_AVG (0xBE) |
| |
| /* init funtions */ |
| int power_fg_init(unsigned char bus); |
| int power_chrg_init(unsigned char bus); |
| int power_bat_init(unsigned char bus); |
| int charger_get_vbus(unsigned int *level); |
| #endif /* __88PM830_H_ */ |