| /dts-v1/; |
| |
| / { |
| #address-cells = <1>; |
| #size-cells = <1>; |
| compatible = "brcm,bcm63268"; |
| |
| aliases { |
| nflash = &nflash; |
| pinctrl = &pinctrl; |
| serial0 = &uart0; |
| serial1 = &uart1; |
| spi0 = &lsspi; |
| spi1 = &hsspi; |
| }; |
| |
| cpus { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| cpu@0 { |
| compatible = "brcm,bmips4350", "mips,mips4Kc"; |
| device_type = "cpu"; |
| reg = <0>; |
| }; |
| |
| cpu@1 { |
| compatible = "brcm,bmips4350", "mips,mips4Kc"; |
| device_type = "cpu"; |
| reg = <1>; |
| }; |
| }; |
| |
| cpu_intc: interrupt-controller { |
| #address-cells = <0>; |
| compatible = "mti,cpu-interrupt-controller"; |
| |
| interrupt-controller; |
| #interrupt-cells = <1>; |
| }; |
| |
| memory { device_type = "memory"; reg = <0 0>; }; |
| |
| ubus@10000000 { |
| #address-cells = <1>; |
| #size-cells = <1>; |
| ranges; |
| compatible = "simple-bus"; |
| interrupt-parent = <&periph_intc>; |
| |
| ext_intc: interrupt-controller@10000018 { |
| compatible = "brcm,bcm6345-ext-intc"; |
| reg = <0x10000018 0x4>; |
| |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| |
| interrupts = <44>, <45>, <46>, <47>; |
| }; |
| |
| periph_intc: interrupt-controller@10000020 { |
| compatible = "brcm,bcm6345-l1-intc"; |
| reg = <0x10000020 0x20>, |
| <0x10000040 0x20>; |
| |
| interrupt-controller; |
| #interrupt-cells = <1>; |
| |
| interrupt-parent = <&cpu_intc>; |
| interrupts = <2>, <3>; |
| }; |
| |
| pinctrl: pin-controller@100000c0 { |
| compatible = "brcm,bcm63268-pinctrl"; |
| reg = <0x100000c0 0x8>, |
| <0x100000c8 0x8>, |
| <0x100000d0 0x4>, |
| <0x100000d8 0x4>, |
| <0x100000dc 0x4>, |
| <0x100000f8 0x4>; |
| reg-names = "dirout", "dat", "led", "mode", |
| "ctrl", "basemode"; |
| |
| gpio-controller; |
| #gpio-cells = <2>; |
| |
| interrupt-parent = <&ext_intc>; |
| interrupts = <0 0>, <1 0>, <2 0>, <3 0>; |
| interrupt-names = "gpio32", "gpio33", "gpio34", "gpio35"; |
| |
| pinctrl_serial_led: serial_led { |
| pinctrl_serial_led_clk: serial_led_clk { |
| function = "serial_led_clk"; |
| pins = "gpio0"; |
| }; |
| |
| pinctrl_serial_led_data: serial_led_data { |
| function = "serial_led_data"; |
| pins = "gpio1"; |
| }; |
| }; |
| |
| pinctrl_hsspi_cs4: hsspi_cs4 { |
| function = "hsspi_cs4"; |
| pins = "gpio16"; |
| }; |
| |
| pinctrl_hsspi_cs5: hsspi_cs5 { |
| function = "hsspi_cs5"; |
| pins = "gpio17"; |
| }; |
| |
| pinctrl_hsspi_cs6: hsspi_cs6 { |
| function = "hsspi_cs6"; |
| pins = "gpio8"; |
| }; |
| |
| pinctrl_hsspi_cs7: hsspi_cs7 { |
| function = "hsspi_cs7"; |
| pins = "gpio9"; |
| }; |
| |
| pinctrl_adsl_spi: adsl_spi { |
| pinctrl_adsl_spi_miso: adsl_spi_miso { |
| function = "adsl_spi_miso"; |
| pins = "gpio18"; |
| }; |
| |
| pinctrl_adsl_spi_mosi: adsl_spi_mosi { |
| function = "adsl_spi_mosi"; |
| pins = "gpio19"; |
| }; |
| }; |
| |
| pinctrl_vreq_clk: vreq_clk { |
| function = "vreq_clk"; |
| pins = "gpio22"; |
| }; |
| |
| pinctrl_pcie_clkreq_b: pcie_clkreq_b { |
| function = "pcie_clkreq_b"; |
| pins = "gpio23"; |
| }; |
| |
| pinctrl_robosw_led_clk: robosw_led_clk { |
| function = "robosw_led_clk"; |
| pins = "gpio30"; |
| }; |
| |
| pinctrl_robosw_led_data: robosw_led_data { |
| function = "robosw_led_data"; |
| pins = "gpio31"; |
| }; |
| |
| pinctrl_nand: nand { |
| function = "nand"; |
| group = "nand_grp"; |
| }; |
| |
| pinctrl_gpio35_alt: gpio35_alt { |
| function = "gpio35_alt"; |
| pin = "gpio35"; |
| }; |
| |
| pinctrl_dectpd: dectpd { |
| function = "dectpd"; |
| group = "dectpd_grp"; |
| }; |
| |
| pinctrl_vdsl_phy_override_0: vdsl_phy_override_0 { |
| function = "vdsl_phy_override_0"; |
| group = "vdsl_phy_override_0_grp"; |
| }; |
| |
| pinctrl_vdsl_phy_override_1: vdsl_phy_override_1 { |
| function = "vdsl_phy_override_1"; |
| group = "vdsl_phy_override_1_grp"; |
| }; |
| |
| pinctrl_vdsl_phy_override_2: vdsl_phy_override_2 { |
| function = "vdsl_phy_override_2"; |
| group = "vdsl_phy_override_2_grp"; |
| }; |
| |
| pinctrl_vdsl_phy_override_3: vdsl_phy_override_3 { |
| function = "vdsl_phy_override_3"; |
| group = "vdsl_phy_override_3_grp"; |
| }; |
| |
| pinctrl_dsl_gpio8: dsl_gpio8 { |
| function = "dsl_gpio8"; |
| group = "dsl_gpio8"; |
| }; |
| |
| pinctrl_dsl_gpio9: dsl_gpio9 { |
| function = "dsl_gpio9"; |
| group = "dsl_gpio9"; |
| }; |
| }; |
| |
| uart0: serial@10000180 { |
| compatible = "brcm,bcm6345-uart"; |
| reg = <0x10000180 0x18>; |
| |
| interrupt-parent = <&periph_intc>; |
| interrupts = <5>; |
| |
| /* clocks = <&periph_clk>; */ |
| /* clock-names = "refclk"; */ |
| |
| status = "disabled"; |
| }; |
| |
| uart1: serial@100001a0 { |
| compatible = "brcm,bcm6345-uart"; |
| reg = <0x100001a0 0x18>; |
| |
| interrupt-parent = <&periph_intc>; |
| interrupts = <34>; |
| |
| /* clocks = <&periph_clk>; */ |
| /* clock-names = "refclk"; */ |
| |
| status = "disabled"; |
| }; |
| |
| lsspi: spi@10000800 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| compatible = "brcm,bcm6358-spi"; |
| reg = <0x10000800 0x70c>; |
| interrupts = <80>; |
| /* clocks = <&clkctl 15>; */ |
| }; |
| |
| hsspi: spi@10001000 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| compatible = "brcm,bcm6328-hsspi"; |
| reg = <0x10001000 0x600>; |
| interrupts = <6>; |
| /* clocks = <&clkctl 16>; */ |
| }; |
| |
| nflash: nand@10000200 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| compatible = "brcm,nand-bcm6368", |
| "brcm,brcmnand-v4.0", |
| "brcm,brcmnand"; |
| reg = <0x10000200 0x180>, |
| <0x10000600 0x200>, |
| <0x100000b0 0x10>; |
| reg-names = "nand", |
| "nand-cache", |
| "nand-int-base"; |
| |
| interrupt-parent = <&periph_intc>; |
| interrupts = <50>; |
| |
| /* clocks = <&clkctl 20>; */ |
| |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_nand>; |
| |
| status = "disabled"; |
| }; |
| |
| leds: led-controller@10001900 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| compatible = "brcm,bcm6328-leds"; |
| reg = <0x10001900 0x24>; |
| status = "disabled"; |
| }; |
| }; |
| }; |