| --- a/arch/mips/include/asm/mach-bcm63xx/pci_ath9k_fixup.h |
| +++ b/arch/mips/include/asm/mach-bcm63xx/pci_ath9k_fixup.h |
| @@ -2,6 +2,7 @@ |
| #define _PCI_ATH9K_FIXUP |
| |
| |
| -void pci_enable_ath9k_fixup(unsigned slot, u32 offset) __init; |
| +void pci_enable_ath9k_fixup(unsigned slot, u32 offset, |
| + unsigned endian_check) __init; |
| |
| #endif /* _PCI_ATH9K_FIXUP */ |
| --- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h |
| +++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h |
| @@ -20,6 +20,7 @@ |
| struct ath9k_caldata { |
| unsigned int slot; |
| u32 caldata_offset; |
| + unsigned int endian_check:1; |
| }; |
| |
| /* |
| --- a/arch/mips/bcm63xx/pci-ath9k-fixup.c |
| +++ b/arch/mips/bcm63xx/pci-ath9k-fixup.c |
| @@ -183,12 +183,14 @@ static void ath9k_pci_fixup(struct pci_d |
| } |
| DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath9k_pci_fixup); |
| |
| -void __init pci_enable_ath9k_fixup(unsigned slot, u32 offset) |
| +void __init pci_enable_ath9k_fixup(unsigned slot, u32 offset, |
| + unsigned endian_check) |
| { |
| if (ath9k_num_fixups >= ARRAY_SIZE(ath9k_fixups)) |
| return; |
| |
| ath9k_fixups[ath9k_num_fixups].slot = slot; |
| + ath9k_fixups[ath9k_num_fixups].pdata.endian_check = endian_check; |
| |
| if (!bcm63xx_read_eeprom(ath9k_fixups[ath9k_num_fixups].pdata.eeprom_data, offset)) |
| return; |
| --- a/arch/mips/bcm63xx/boards/board_common.c |
| +++ b/arch/mips/bcm63xx/boards/board_common.c |
| @@ -245,7 +245,8 @@ int __init board_register_devices(void) |
| |
| /* register any fixups */ |
| for (i = 0; i < board.has_caldata; i++) |
| - pci_enable_ath9k_fixup(board.caldata[i].slot, board.caldata[i].caldata_offset); |
| + pci_enable_ath9k_fixup(board.caldata[i].slot, board.caldata[i].caldata_offset, |
| + board.caldata[i].endian_check); |
| |
| return 0; |
| } |