| From e01c91a360793298c9e1656a61faceff01487a43 Mon Sep 17 00:00:00 2001 |
| From: Ben Hutchings <ben@decadent.org.uk> |
| Date: Sat, 23 May 2020 23:50:34 +0800 |
| Subject: [PATCH] MIPS: Fix exception handler memcpy() |
| |
| The exception handler subroutines are declared as a single char, but |
| when copied to the required addresses the copy length is 0x80. |
| |
| When range checks are enabled for memcpy() this results in a build |
| failure, with error messages such as: |
| |
| In file included from arch/mips/mti-malta/malta-init.c:15: |
| In function 'memcpy', |
| inlined from 'mips_nmi_setup' at arch/mips/mti-malta/malta-init.c:98:2: |
| include/linux/string.h:376:4: error: call to '__read_overflow2' declared with attribute error: detected read beyond size of object passed as 2nd parameter |
| 376 | __read_overflow2(); |
| | ^~~~~~~~~~~~~~~~~~ |
| |
| Change the declarations to use type char[]. |
| |
| Signed-off-by: Ben Hutchings <ben@decadent.org.uk> |
| Signed-off-by: YunQiang Su <syq@debian.org> |
| Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> |
| --- |
| arch/mips/loongson64/common/init.c | 4 ++-- |
| arch/mips/mti-malta/malta-init.c | 8 ++++---- |
| arch/mips/pistachio/init.c | 8 ++++---- |
| 3 files changed, 10 insertions(+), 10 deletions(-) |
| |
| --- a/arch/mips/loongson64/common/init.c |
| +++ b/arch/mips/loongson64/common/init.c |
| @@ -18,10 +18,10 @@ unsigned long __maybe_unused _loongson_a |
| static void __init mips_nmi_setup(void) |
| { |
| void *base; |
| - extern char except_vec_nmi; |
| + extern char except_vec_nmi[]; |
| |
| base = (void *)(CAC_BASE + 0x380); |
| - memcpy(base, &except_vec_nmi, 0x80); |
| + memcpy(base, except_vec_nmi, 0x80); |
| flush_icache_range((unsigned long)base, (unsigned long)base + 0x80); |
| } |
| |
| --- a/arch/mips/mti-malta/malta-init.c |
| +++ b/arch/mips/mti-malta/malta-init.c |
| @@ -90,24 +90,24 @@ static void __init console_config(void) |
| static void __init mips_nmi_setup(void) |
| { |
| void *base; |
| - extern char except_vec_nmi; |
| + extern char except_vec_nmi[]; |
| |
| base = cpu_has_veic ? |
| (void *)(CAC_BASE + 0xa80) : |
| (void *)(CAC_BASE + 0x380); |
| - memcpy(base, &except_vec_nmi, 0x80); |
| + memcpy(base, except_vec_nmi, 0x80); |
| flush_icache_range((unsigned long)base, (unsigned long)base + 0x80); |
| } |
| |
| static void __init mips_ejtag_setup(void) |
| { |
| void *base; |
| - extern char except_vec_ejtag_debug; |
| + extern char except_vec_ejtag_debug[]; |
| |
| base = cpu_has_veic ? |
| (void *)(CAC_BASE + 0xa00) : |
| (void *)(CAC_BASE + 0x300); |
| - memcpy(base, &except_vec_ejtag_debug, 0x80); |
| + memcpy(base, except_vec_ejtag_debug, 0x80); |
| flush_icache_range((unsigned long)base, (unsigned long)base + 0x80); |
| } |
| |
| --- a/arch/mips/pistachio/init.c |
| +++ b/arch/mips/pistachio/init.c |
| @@ -83,12 +83,12 @@ phys_addr_t mips_cdmm_phys_base(void) |
| static void __init mips_nmi_setup(void) |
| { |
| void *base; |
| - extern char except_vec_nmi; |
| + extern char except_vec_nmi[]; |
| |
| base = cpu_has_veic ? |
| (void *)(CAC_BASE + 0xa80) : |
| (void *)(CAC_BASE + 0x380); |
| - memcpy(base, &except_vec_nmi, 0x80); |
| + memcpy(base, except_vec_nmi, 0x80); |
| flush_icache_range((unsigned long)base, |
| (unsigned long)base + 0x80); |
| } |
| @@ -96,12 +96,12 @@ static void __init mips_nmi_setup(void) |
| static void __init mips_ejtag_setup(void) |
| { |
| void *base; |
| - extern char except_vec_ejtag_debug; |
| + extern char except_vec_ejtag_debug[]; |
| |
| base = cpu_has_veic ? |
| (void *)(CAC_BASE + 0xa00) : |
| (void *)(CAC_BASE + 0x300); |
| - memcpy(base, &except_vec_ejtag_debug, 0x80); |
| + memcpy(base, except_vec_ejtag_debug, 0x80); |
| flush_icache_range((unsigned long)base, |
| (unsigned long)base + 0x80); |
| } |