| From: Russell King <rmk+kernel@armlinux.org.uk> |
| Bcc: linux@mail.armlinux.org.uk |
| Cc: linux-i2c@vger.kernel.org |
| Subject: [PATCH 08/17] i2c: pxa: move private definitions to i2c-pxa.c |
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| |
| Move driver-private definitions out of the i2c-pxa.h platform data |
| header file into the driver itself. Nothing outside of the driver |
| makes use of these constants. |
| |
| Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> |
| --- |
| drivers/i2c/busses/i2c-pxa.c | 43 ++++++++++++++++++++++++ |
| include/linux/platform_data/i2c-pxa.h | 48 --------------------------- |
| 2 files changed, 43 insertions(+), 48 deletions(-) |
| |
| --- a/drivers/i2c/busses/i2c-pxa.c |
| +++ b/drivers/i2c/busses/i2c-pxa.c |
| @@ -86,6 +86,49 @@ |
| #define IWCR_HS_CNT2_SHIFT 10 |
| #define IWCR_HS_CNT2_MASK (0x1F << IWCR_HS_CNT2_SHIFT) |
| |
| +/* need a longer timeout if we're dealing with the fact we may well be |
| + * looking at a multi-master environment |
| + */ |
| +#define DEF_TIMEOUT 32 |
| + |
| +#define BUS_ERROR (-EREMOTEIO) |
| +#define XFER_NAKED (-ECONNREFUSED) |
| +#define I2C_RETRY (-2000) /* an error has occurred retry transmit */ |
| + |
| +/* ICR initialize bit values |
| + * |
| + * 15 FM 0 (100 kHz operation) |
| + * 14 UR 0 (No unit reset) |
| + * 13 SADIE 0 (Disables the unit from interrupting on slave addresses |
| + * matching its slave address) |
| + * 12 ALDIE 0 (Disables the unit from interrupt when it loses arbitration |
| + * in master mode) |
| + * 11 SSDIE 0 (Disables interrupts from a slave stop detected, in slave mode) |
| + * 10 BEIE 1 (Enable interrupts from detected bus errors, no ACK sent) |
| + * 9 IRFIE 1 (Enable interrupts from full buffer received) |
| + * 8 ITEIE 1 (Enables the I2C unit to interrupt when transmit buffer empty) |
| + * 7 GCD 1 (Disables i2c unit response to general call messages as a slave) |
| + * 6 IUE 0 (Disable unit until we change settings) |
| + * 5 SCLE 1 (Enables the i2c clock output for master mode (drives SCL) |
| + * 4 MA 0 (Only send stop with the ICR stop bit) |
| + * 3 TB 0 (We are not transmitting a byte initially) |
| + * 2 ACKNAK 0 (Send an ACK after the unit receives a byte) |
| + * 1 STOP 0 (Do not send a STOP) |
| + * 0 START 0 (Do not send a START) |
| + */ |
| +#define I2C_ICR_INIT (ICR_BEIE | ICR_IRFIE | ICR_ITEIE | ICR_GCD | ICR_SCLE) |
| + |
| +/* I2C status register init values |
| + * |
| + * 10 BED 1 (Clear bus error detected) |
| + * 9 SAD 1 (Clear slave address detected) |
| + * 7 IRF 1 (Clear IDBR Receive Full) |
| + * 6 ITE 1 (Clear IDBR Transmit Empty) |
| + * 5 ALD 1 (Clear Arbitration Loss Detected) |
| + * 4 SSD 1 (Clear Slave Stop Detected) |
| + */ |
| +#define I2C_ISR_INIT 0x7FF /* status register init */ |
| + |
| struct pxa_reg_layout { |
| u32 ibmr; |
| u32 idbr; |
| --- a/include/linux/platform_data/i2c-pxa.h |
| +++ b/include/linux/platform_data/i2c-pxa.h |
| @@ -7,54 +7,6 @@ |
| #ifndef _I2C_PXA_H_ |
| #define _I2C_PXA_H_ |
| |
| -#if 0 |
| -#define DEF_TIMEOUT 3 |
| -#else |
| -/* need a longer timeout if we're dealing with the fact we may well be |
| - * looking at a multi-master environment |
| -*/ |
| -#define DEF_TIMEOUT 32 |
| -#endif |
| - |
| -#define BUS_ERROR (-EREMOTEIO) |
| -#define XFER_NAKED (-ECONNREFUSED) |
| -#define I2C_RETRY (-2000) /* an error has occurred retry transmit */ |
| - |
| -/* ICR initialize bit values |
| -* |
| -* 15. FM 0 (100 Khz operation) |
| -* 14. UR 0 (No unit reset) |
| -* 13. SADIE 0 (Disables the unit from interrupting on slave addresses |
| -* matching its slave address) |
| -* 12. ALDIE 0 (Disables the unit from interrupt when it loses arbitration |
| -* in master mode) |
| -* 11. SSDIE 0 (Disables interrupts from a slave stop detected, in slave mode) |
| -* 10. BEIE 1 (Enable interrupts from detected bus errors, no ACK sent) |
| -* 9. IRFIE 1 (Enable interrupts from full buffer received) |
| -* 8. ITEIE 1 (Enables the I2C unit to interrupt when transmit buffer empty) |
| -* 7. GCD 1 (Disables i2c unit response to general call messages as a slave) |
| -* 6. IUE 0 (Disable unit until we change settings) |
| -* 5. SCLE 1 (Enables the i2c clock output for master mode (drives SCL) |
| -* 4. MA 0 (Only send stop with the ICR stop bit) |
| -* 3. TB 0 (We are not transmitting a byte initially) |
| -* 2. ACKNAK 0 (Send an ACK after the unit receives a byte) |
| -* 1. STOP 0 (Do not send a STOP) |
| -* 0. START 0 (Do not send a START) |
| -* |
| -*/ |
| -#define I2C_ICR_INIT (ICR_BEIE | ICR_IRFIE | ICR_ITEIE | ICR_GCD | ICR_SCLE) |
| - |
| -/* I2C status register init values |
| - * |
| - * 10. BED 1 (Clear bus error detected) |
| - * 9. SAD 1 (Clear slave address detected) |
| - * 7. IRF 1 (Clear IDBR Receive Full) |
| - * 6. ITE 1 (Clear IDBR Transmit Empty) |
| - * 5. ALD 1 (Clear Arbitration Loss Detected) |
| - * 4. SSD 1 (Clear Slave Stop Detected) |
| - */ |
| -#define I2C_ISR_INIT 0x7FF /* status register init */ |
| - |
| struct i2c_slave_client; |
| |
| struct i2c_pxa_platform_data { |