| From 707745e8d4e75b638b990d67950ab292b3b8ea2a Mon Sep 17 00:00:00 2001 |
| From: David Bauer <mail@david-bauer.net> |
| Date: Mon, 16 Dec 2019 01:36:46 +0100 |
| Subject: [PATCH] mtd: spi-nor: Add support for mx25r3235f |
| |
| Add MTD support for the Macronix MX25R3235F SPI NOR chip from Macronix. |
| The chip has 4MB of total capacity, divided into a total of 64 sectors, |
| each 64KB sized. The chip also supports 4KB large sectors. |
| Additionally, it supports dual and quad read modes. |
| |
| Functionality was verified on an HPE/Aruba AP-303 board. |
| |
| Signed-off-by: David Bauer <mail@david-bauer.net> |
| Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> |
| --- |
| drivers/mtd/spi-nor/spi-nor.c | 2 ++ |
| 1 file changed, 2 insertions(+) |
| |
| --- a/drivers/mtd/spi-nor/spi-nor.c |
| +++ b/drivers/mtd/spi-nor/spi-nor.c |
| @@ -2356,6 +2356,8 @@ static const struct flash_info spi_nor_i |
| { "mx25u6435f", INFO(0xc22537, 0, 64 * 1024, 128, SECT_4K) }, |
| { "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256, 0) }, |
| { "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256, 0) }, |
| + { "mx25r3235f", INFO(0xc22816, 0, 64 * 1024, 64, |
| + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, |
| { "mx25u12835f", INFO(0xc22538, 0, 64 * 1024, 256, |
| SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, |
| { "mx25l25635e", INFO(0xc22019, 0, 64 * 1024, 512, |