| --- a/arch/mips/lantiq/xway/sysctrl.c |
| +++ b/arch/mips/lantiq/xway/sysctrl.c |
| @@ -436,6 +436,20 @@ static void clkdev_add_clkout(void) |
| } |
| } |
| |
| +static void set_phy_clock_source(struct device_node *np_cgu) |
| +{ |
| + u32 phy_clk_src, ifcc; |
| + |
| + if (!np_cgu) |
| + return; |
| + |
| + if (of_property_read_u32(np_cgu, "lantiq,phy-clk-src", &phy_clk_src)) |
| + return; |
| + |
| + ifcc = ltq_cgu_r32(ifccr) & ~(0x1c); |
| + ltq_cgu_w32(ifcc | (phy_clk_src << 2), ifccr); |
| +} |
| + |
| /* bring up all register ranges that we need for basic system control */ |
| void __init ltq_soc_init(void) |
| { |
| @@ -599,4 +613,6 @@ void __init ltq_soc_init(void) |
| clkdev_add_pmu("1e100400.serial", NULL, 1, 0, PMU_ASC0); |
| } |
| usb_set_clock(); |
| + |
| + set_phy_clock_source(np_cgu); |
| } |