| From ad5077a8da6e8aad01b7b6ad979b52c39118969d Mon Sep 17 00:00:00 2001 |
| From: Laurentiu Tudor <laurentiu.tudor@nxp.com> |
| Date: Tue, 17 Dec 2019 13:26:37 +0200 |
| Subject: [PATCH] arm64: dts: lx2160a: add iommu-map property to pci nodes |
| |
| Add the iommu-map property to the pci nodes so that the firmware |
| fixes it up with the required values thus enabling iommu for |
| devices connected over pci. |
| |
| Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com> |
| Acked-by: Li Yang <leoyang.li@nxp.com> |
| --- |
| arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 6 ++++++ |
| 1 file changed, 6 insertions(+) |
| |
| --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi |
| +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi |
| @@ -954,6 +954,7 @@ |
| bus-range = <0x0 0xff>; |
| ranges = <0x82000000 0x0 0x40000000 0x80 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ |
| msi-parent = <&its>; |
| + iommu-map = <0 &smmu 0 1>; /* This is fixed-up by u-boot */ |
| #interrupt-cells = <1>; |
| interrupt-map-mask = <0 0 0 7>; |
| interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, |
| @@ -990,6 +991,7 @@ |
| bus-range = <0x0 0xff>; |
| ranges = <0x82000000 0x0 0x40000000 0x88 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ |
| msi-parent = <&its>; |
| + iommu-map = <0 &smmu 0 1>; /* This is fixed-up by u-boot */ |
| #interrupt-cells = <1>; |
| interrupt-map-mask = <0 0 0 7>; |
| interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>, |
| @@ -1026,6 +1028,7 @@ |
| bus-range = <0x0 0xff>; |
| ranges = <0x82000000 0x0 0x40000000 0x90 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ |
| msi-parent = <&its>; |
| + iommu-map = <0 &smmu 0 1>; /* This is fixed-up by u-boot */ |
| #interrupt-cells = <1>; |
| interrupt-map-mask = <0 0 0 7>; |
| interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>, |
| @@ -1063,6 +1066,7 @@ |
| bus-range = <0x0 0xff>; |
| ranges = <0x82000000 0x0 0x40000000 0x98 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ |
| msi-parent = <&its>; |
| + iommu-map = <0 &smmu 0 1>; /* This is fixed-up by u-boot */ |
| #interrupt-cells = <1>; |
| interrupt-map-mask = <0 0 0 7>; |
| interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, |
| @@ -1099,6 +1103,7 @@ |
| bus-range = <0x0 0xff>; |
| ranges = <0x82000000 0x0 0x40000000 0xa0 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ |
| msi-parent = <&its>; |
| + iommu-map = <0 &smmu 0 1>; /* This is fixed-up by u-boot */ |
| #interrupt-cells = <1>; |
| interrupt-map-mask = <0 0 0 7>; |
| interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, |
| @@ -1136,6 +1141,7 @@ |
| bus-range = <0x0 0xff>; |
| ranges = <0x82000000 0x0 0x40000000 0xa8 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ |
| msi-parent = <&its>; |
| + iommu-map = <0 &smmu 0 1>; /* This is fixed-up by u-boot */ |
| #interrupt-cells = <1>; |
| interrupt-map-mask = <0 0 0 7>; |
| interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, |