| From 08861b67c94a28e3a1bbcfb04a141ab0eafa5dac Mon Sep 17 00:00:00 2001 |
| From: Calvin Johnson <calvin.johnson@nxp.com> |
| Date: Sat, 16 Sep 2017 07:05:49 +0530 |
| Subject: [PATCH] net: fsl_ppfe: dts binding for ppfe |
| |
| Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> |
| Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com> |
| --- |
| .../devicetree/bindings/net/fsl_ppfe/pfe.txt | 173 +++++++++++++++++++++ |
| 1 file changed, 173 insertions(+) |
| create mode 100644 Documentation/devicetree/bindings/net/fsl_ppfe/pfe.txt |
| |
| --- /dev/null |
| +++ b/Documentation/devicetree/bindings/net/fsl_ppfe/pfe.txt |
| @@ -0,0 +1,173 @@ |
| +============================================================================= |
| +NXP Programmable Packet Forwarding Engine Device Bindings |
| + |
| +CONTENTS |
| + - PFE Node |
| + - Ethernet Node |
| + |
| +============================================================================= |
| +PFE Node |
| + |
| +DESCRIPTION |
| + |
| +PFE Node has all the properties associated with Packet Forwarding Engine block. |
| + |
| +PROPERTIES |
| + |
| +- compatible |
| + Usage: required |
| + Value type: <stringlist> |
| + Definition: Must include "fsl,pfe" |
| + |
| +- reg |
| + Usage: required |
| + Value type: <prop-encoded-array> |
| + Definition: A standard property. |
| + Specifies the offset of the following registers: |
| + - PFE configuration registers |
| + - DDR memory used by PFE |
| + |
| +- fsl,pfe-num-interfaces |
| + Usage: required |
| + Value type: <u32> |
| + Definition: Must be present. Value can be either one or two. |
| + |
| +- interrupts |
| + Usage: required |
| + Value type: <prop-encoded-array> |
| + Definition: Three interrupts are specified in this property. |
| + - HIF interrupt |
| + - HIF NO COPY interrupt |
| + - Wake On LAN interrupt |
| + |
| +- interrupt-names |
| + Usage: required |
| + Value type: <stringlist> |
| + Definition: Following strings are defined for the 3 interrupts. |
| + "pfe_hif" - HIF interrupt |
| + "pfe_hif_nocpy" - HIF NO COPY interrupt |
| + "pfe_wol" - Wake On LAN interrupt |
| + |
| +- memory-region |
| + Usage: required |
| + Value type: <phandle> |
| + Definition: phandle to a node describing reserved memory used by pfe. |
| + Refer:- Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt |
| + |
| +- fsl,pfe-scfg |
| + Usage: required |
| + Value type: <phandle> |
| + Definition: phandle for scfg. |
| + |
| +- fsl,rcpm-wakeup |
| + Usage: required |
| + Value type: <phandle> |
| + Definition: phandle for rcpm. |
| + |
| +- clocks |
| + Usage: required |
| + Value type: <phandle> |
| + Definition: phandle for clockgen. |
| + |
| +- clock-names |
| + Usage: required |
| + Value type: <string> |
| + Definition: phandle for clock name. |
| + |
| +EXAMPLE |
| + |
| +pfe: pfe@04000000 { |
| + compatible = "fsl,pfe"; |
| + reg = <0x0 0x04000000 0x0 0xc00000>, /* AXI 16M */ |
| + <0x0 0x83400000 0x0 0xc00000>; /* PFE DDR 12M */ |
| + reg-names = "pfe", "pfe-ddr"; |
| + fsl,pfe-num-interfaces = <0x2>; |
| + interrupts = <0 172 0x4>, /* HIF interrupt */ |
| + <0 173 0x4>, /*HIF_NOCPY interrupt */ |
| + <0 174 0x4>; /* WoL interrupt */ |
| + interrupt-names = "pfe_hif", "pfe_hif_nocpy", "pfe_wol"; |
| + memory-region = <&pfe_reserved>; |
| + fsl,pfe-scfg = <&scfg 0>; |
| + fsl,rcpm-wakeup = <&rcpm 0xf0000020>; |
| + clocks = <&clockgen 4 0>; |
| + clock-names = "pfe"; |
| + |
| + status = "okay"; |
| + pfe_mac0: ethernet@0 { |
| + }; |
| + |
| + pfe_mac1: ethernet@1 { |
| + }; |
| +}; |
| + |
| +============================================================================= |
| +Ethernet Node |
| + |
| +DESCRIPTION |
| + |
| +Ethernet Node has all the properties associated with PFE used by platforms to |
| +connect to PHY: |
| + |
| +PROPERTIES |
| + |
| +- compatible |
| + Usage: required |
| + Value type: <stringlist> |
| + Definition: Must include "fsl,pfe-gemac-port" |
| + |
| +- reg |
| + Usage: required |
| + Value type: <prop-encoded-array> |
| + Definition: A standard property. |
| + Specifies the gemacid of the interface. |
| + |
| +- fsl,gemac-bus-id |
| + Usage: required |
| + Value type: <u32> |
| + Definition: Must be present. Value should be the id of the bus |
| + connected to gemac. |
| + |
| +- fsl,gemac-phy-id |
| + Usage: required |
| + Value type: <u32> |
| + Definition: Must be present. Value should be the id of the phy |
| + connected to gemac. |
| + |
| +- fsl,mdio-mux-val |
| + Usage: required |
| + Value type: <u32> |
| + Definition: Must be present. Value can be either 0 or 2 or 3. |
| + This value is used to configure the mux to enable mdio. |
| + |
| +- phy-mode |
| + Usage: required |
| + Value type: <string> |
| + Definition: Must include "sgmii" |
| + |
| +- fsl,pfe-phy-if-flags |
| + Usage: required |
| + Value type: <u32> |
| + Definition: Must be present. Value should be 0 by default. |
| + If there is not phy connected, this need to be 1. |
| + |
| +- mdio |
| + optional subnode that specifies the mdio bus. This has reg |
| + property which is used to enable/disable the mdio bus. |
| + |
| +EXAMPLE |
| + |
| +ethernet@0 { |
| + compatible = "fsl,pfe-gemac-port"; |
| + #address-cells = <1>; |
| + #size-cells = <0>; |
| + reg = <0x0>; /* GEM_ID */ |
| + fsl,gemac-bus-id = <0x0>; /* BUS_ID */ |
| + fsl,gemac-phy-id = <0x2>; /* PHY_ID */ |
| + fsl,mdio-mux-val = <0x0>; |
| + phy-mode = "sgmii"; |
| + fsl,pfe-phy-if-flags = <0x0>; |
| + |
| + mdio@0 { |
| + reg = <0x1>; /* enabled/disabled */ |
| + }; |
| +}; |