[Feature][T108] add RTL9000Bf phy driver
Change-Id: I898129ed3fc902e369eb45e542a765567915f91c
diff --git a/marvell/linux/drivers/net/phy/realtek.c b/marvell/linux/drivers/net/phy/realtek.c
index e55375f..2b797a2 100644
--- a/marvell/linux/drivers/net/phy/realtek.c
+++ b/marvell/linux/drivers/net/phy/realtek.c
@@ -703,6 +703,131 @@
return ret;
}
+static int rtl9000Bf_config_init(struct phy_device *phydev)
+{
+ printk("phy_debug:func:%s,line:%d\n", __FUNCTION__, __LINE__);
+ u32 mdio_data = 0;
+ u32 io_data = 0;
+ int timer = 2000;
+
+ __phy_write(phydev, 0, 0x8000); // PHY soft-reset
+ mdelay(30);
+#if 0
+ //phy power down
+ phy_write(phydev, 0, 0x800);
+ mdelay(10);
+#endif
+ //sample_code 04
+ //phy_write(phydev, 0x1F, 0x0A43);
+ __phy_write(phydev, 0x1B, 0x8017);
+ __phy_write(phydev, 0x1C, 0xFB03); // PHY patch request
+ __phy_write(phydev, 0x1B, 0x8092);
+ __phy_write(phydev, 0x1C, 0x6000);
+ __phy_write(phydev, 0x1B, 0x80AF);
+ __phy_write(phydev, 0x1C, 0x6000);
+ __phy_write(phydev, 0x1B, 0x807D);
+ __phy_write(phydev, 0x1C, 0x4443);
+ __phy_write(phydev, 0x1B, 0x809A);
+ __phy_write(phydev, 0x1C, 0x4443);
+ __phy_write(phydev, 0x1B, 0x81A3);
+ __phy_write(phydev, 0x1C, 0x0F00);
+ __phy_write(phydev, 0x1F, 0x0A81);
+ __phy_write(phydev, 0x12, 0x0004);
+ __phy_write(phydev, 0x1B, 0x83C8);
+ __phy_write(phydev, 0x1C, 0x0005);
+ __phy_write(phydev, 0x1F, 0x0A5C);
+ __phy_write(phydev, 0x12, 0x0003);
+ __phy_write(phydev, 0x1B, 0xB820);
+ __phy_write(phydev, 0x1C, 0x0010);
+ __phy_write(phydev, 0x1B, 0xB830);
+ __phy_write(phydev, 0x1C, 0x8000);
+ //__phy_write(phydev, 0x1B, 0xB800);
+ do {
+ __phy_write(phydev, 0x1B, 0xB800);
+ io_data = (__phy_read(phydev, 0x1C)) & 0x40;
+ timer--;
+ if (timer == 0) {
+ timer = 2000;
+ printk("phy_debug: phy init error func:%s,line:%d\n", __FUNCTION__, __LINE__);
+
+ break;
+ }
+ } while (io_data == 0);
+
+ __phy_write(phydev, 0x1B, 0x8020);
+ __phy_write(phydev, 0x1C, 0x3300);
+ __phy_write(phydev, 0x1B, 0xB82E);
+ __phy_write(phydev, 0x1C, 0x0001);
+ __phy_write(phydev, 0x1B, 0xB820);
+ __phy_write(phydev, 0x1C, 0x0290);
+ __phy_write(phydev, 0x1B, 0xA012);
+ __phy_write(phydev, 0x1C, 0x0000);
+ __phy_write(phydev, 0x1B, 0xA014);
+ __phy_write(phydev, 0x1C, 0x401C);
+ __phy_write(phydev, 0x1C, 0xA610);
+ __phy_write(phydev, 0x1C, 0x8520);
+ __phy_write(phydev, 0x1C, 0xA510);
+ __phy_write(phydev, 0x1C, 0x21F4);
+ __phy_write(phydev, 0x1B, 0xA01A);
+ __phy_write(phydev, 0x1C, 0x0000);
+ __phy_write(phydev, 0x1B, 0xA000);
+ __phy_write(phydev, 0x1C, 0x11EF);
+ __phy_write(phydev, 0x1B, 0xB820);
+ __phy_write(phydev, 0x1C, 0x0210);
+ __phy_write(phydev, 0x1B, 0xB82E);
+ __phy_write(phydev, 0x1C, 0x0000);
+ __phy_write(phydev, 0x1B, 0x8020);
+ __phy_write(phydev, 0x1C, 0x0000);
+ __phy_write(phydev, 0x1B, 0xB820);
+ __phy_write(phydev, 0x1C, 0x0000);
+ //__phy_write(phydev, 0x1B, 0xB800);
+ do {
+ __phy_write(phydev, 0x1B, 0xB800);
+ io_data = (__phy_read(phydev, 0x1C)) & 0x40;
+ timer--;
+ if (timer == 0) {
+ printk("phy_debug: phy init error func:%s,line:%d\n", __FUNCTION__, __LINE__);
+
+ break;
+ }
+ } while (io_data != 0);
+
+ printk("phy_debug phy init success\n");
+
+ /* I/O Power Sllection */
+ __phy_write(phydev, 0x1F, 0x0A4C);//change page to default value
+ mdio_data = __phy_read(phydev, 0x12);
+ mdio_data &= 0xC7FF;
+ mdio_data |= 4 << 11;
+ __phy_write(phydev, 0x12, mdio_data);
+
+
+ printk("phy_debug set rgmii driving strengths is 1.8v\n");
+
+ phydev->autoneg = AUTONEG_DISABLE;
+ phydev->duplex = DUPLEX_FULL;
+
+#if 0
+//phy power on
+ __phy_write(phydev, 0, 0x2100);
+#endif
+ //mdio_misc_init(phydev);
+ return 0;
+}
+
+static int rtl9000Bf_read_status(struct phy_device *phydev)
+{
+ //printk("phy_debug:func:%s,line:%d\n", __FUNCTION__, __LINE__);
+
+ phydev->duplex = DUPLEX_FULL;
+ phydev->speed = SPEED_100;
+ phydev->pause = 0;
+ phydev->asym_pause = 0;
+ phydev->link = 1;
+
+ return 0;
+}
+
static struct phy_driver realtek_drvs[] = {
{
PHY_ID_MATCH_EXACT(0x00008201),
@@ -841,13 +966,25 @@
.write_page = rtl821x_write_page,
.read_mmd = rtl822x_read_mmd,
.write_mmd = rtl822x_write_mmd,
- },
+ }, {
+ PHY_ID_MATCH_EXACT(0x001ccb00),
+ .name = "RTL90000Bf PHY",
+ .config_init = &rtl9000Bf_config_init,
+// .remove = &rtl900Bf_remove,
+ .read_status = rtl9000Bf_read_status,
+ .suspend = genphy_suspend,
+ .resume = rtlgen_resume,
+ },
+
};
+
+
module_phy_driver(realtek_drvs);
static const struct mdio_device_id __maybe_unused realtek_tbl[] = {
{ PHY_ID_MATCH_VENDOR(0x001cc800) },
+ { 0x001ccb00, 0x001fffff },
{ }
};