| From df8cea437a14a4a412a32058ca49a2b30b48cc71 Mon Sep 17 00:00:00 2001 |
| From: Chuanhua Han <chuanhua.han@nxp.com> |
| Date: Fri, 26 Oct 2018 12:08:55 +0800 |
| Subject: [PATCH] arm64: dts: lx2160a: add dspi controller DT nodes |
| |
| Add the dspi support on lx2160 |
| |
| Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com> |
| Signed-off-by: Bao Xiaowei <xiaowei.bao@nxp.com> |
| Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> |
| --- |
| arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 39 ++++++++++++++++++++++++++ |
| 1 file changed, 39 insertions(+) |
| |
| --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi |
| +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi |
| @@ -603,6 +603,45 @@ |
| status = "disabled"; |
| }; |
| |
| + dspi0: spi@2100000 { |
| + compatible = "fsl,lx2160a-dspi", "fsl,ls2085a-dspi"; |
| + #address-cells = <1>; |
| + #size-cells = <0>; |
| + reg = <0x0 0x2100000 0x0 0x10000>; |
| + interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; |
| + clocks = <&clockgen 4 7>; |
| + clock-names = "dspi"; |
| + spi-num-chipselects = <5>; |
| + bus-num = <0>; |
| + status = "disabled"; |
| + }; |
| + |
| + dspi1: spi@2110000 { |
| + compatible = "fsl,lx2160a-dspi", "fsl,ls2085a-dspi"; |
| + #address-cells = <1>; |
| + #size-cells = <0>; |
| + reg = <0x0 0x2110000 0x0 0x10000>; |
| + interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; |
| + clocks = <&clockgen 4 7>; |
| + clock-names = "dspi"; |
| + spi-num-chipselects = <5>; |
| + bus-num = <1>; |
| + status = "disabled"; |
| + }; |
| + |
| + dspi2: spi@2120000 { |
| + compatible = "fsl,lx2160a-dspi", "fsl,ls2085a-dspi"; |
| + #address-cells = <1>; |
| + #size-cells = <0>; |
| + reg = <0x0 0x2120000 0x0 0x10000>; |
| + interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>; |
| + clocks = <&clockgen 4 7>; |
| + clock-names = "dspi"; |
| + spi-num-chipselects = <5>; |
| + bus-num = <2>; |
| + status = "disabled"; |
| + }; |
| + |
| esdhc0: esdhc@2140000 { |
| compatible = "fsl,esdhc"; |
| reg = <0x0 0x2140000 0x0 0x10000>; |