marvell/linux/arch/arm/boot/dts/asr1806-p301.dts

// SPDX-License-Identifier: GPL-2.0
/*
 *  Copyright (C) 2023 ASR Microelectronics Co., Ltd.
 */

/dts-v1/;
#include "asr1806.dtsi"

/ {
	model = "ASR 1806(FALCON-T) Board EVB";
	compatible = "asr,1803-evb", "asr,1803";

	chosen {
		bootargs = "root=/dev/mtdblock5 rootfstype=squashfs init=/etc/preinit noinitrd console=ttyS0,115200 mem=128M";
	};

	memory {
		reg = <0x00000000 0x10000000>;
	};

	firmware {
		optee {
			compatible = "linaro,optee-tz";
			method = "smc";
		};
	};

	soc {
		axi@d4200000 {	/* AXI */
			usbphy: usbphy@d4207000 {
				status = "okay";
			};
#ifdef CONFIG_USB_DWC2_ASR_OTG /* otg mode */
			usb: usb@c0000000 {
				dr_mode = "otg";
				pinctrl-names = "default","sleep";
				pinctrl-0 = <&usb_id_pinmux &usb_host_pinmux>;
				pinctrl-1 = <&usb_id_pinmux_slp &usb_host_pinmux>;
				usbid_gpio = <99>;
				edge_detect_gpio = <99>;
				otg,use-gpio-vbus;
				gpio-num = <122>;
				status = "okay";
			};
#else
			usb: usb@c0000000 {
				status = "okay";
			};
#endif

			eth0: asr-eth@0xd4281800 {
				compatible = "asr,asr-eth";
				pinctrl-names = "default", "rgmii-pins", "sleep";
				pinctrl-0 = <&emac_pmx_func0 &emac_pmx_func2 &emac_pmx_func3>;
				pinctrl-1 = <&emac_pmx_func0 &emac_pmx_func1 &emac_pmx_func2 &emac_pmx_func3>;				
				pinctrl-2 = <&emac_pmx_func0_slp &emac_pmx_func1_slp &emac_pmx_func2_slp>;

				reg = <0xd4281800 0x200>;
				interrupts = <10 11>;
				lpm-qos = <PM_QOS_CPUIDLE_BLOCK_AXI>;
				clocks = <&soc_clocks ASR1803_CLK_EMAC
					  &soc_clocks ASR1803_CLK_EMAC_PTP>;
				clock-names = "emac-clk", "ptp-clk";
				ptp-support;
				ptp-clk-rate = <100000000>;
				status = "okay";
				enable-suspend;
			//	reset-gpio = <&gpio 42 0>;
			//	reset-active-low;
			//	reset-delays-us = <100000 100000 100000>;
				local-mac-address = [02 00 00 00 10 01];
				//ldo-gpio = <&gpio 40 0>;
				//ldo-active-low;
			//	ldo-delays-us = <0 100000 100000>;
				//vmmc-supply = <0x19>;
				mdio-clk-div = <254>;
				flow-control-threshold = <60 90>;
				clk-tuning-enable;
				/* clk-config(32bit)
				 *
				 * clk_sel(clk-config[23:16])
				 * RGMII:
				 *  tx | clk_sel: 0 - from external RX clock
				 *                1 - from inverted external RX clock
				 *  rx | clk_sel: 0 - from external RX clock
				 *                1 - from inverted external RX clock
				 *
				 * RMII:
				 *  tx | clk_sel: 0 - RMII clock
				 *                1 - Inverted RMII clock
				 *  rx | clk_sel: 0 - RMII clock
				 *                1 - Inverted RMII clock
				 *
				 */
#if 0
				/* enable 1000M phy*/
				3v3-enable = <0>; /* IO voltage, 1 - 3.3v, 0 - 1.8v */
				phy-handle = <&phy3>;
#else
				/* enable 100M phy*/
				3v3-enable = <0>; /* IO voltage, 1 - 3.3v, 0 - 1.8v */
				phy-handle = <&phy0>;
#endif
				/* enable fix link for ethernet switch */
				/*
					fixed-link {
						speed = <100>;
						full-duplex;
						phy-mode = "rmii";
					};
				*/

				mdio: mdio-bus {
					#address-cells = <0x1>;
					#size-cells = <0x0>;
					/* YT8521 10M/100M/100OM 1.8V RGMII PHY */
					phy0: phy@0 {
						compatible = "ethernet-phy-ieee802.3-c22";
						device_type = "ethernet-phy";
						reg = <0x0>; /* set phy address*/
						rst-gpio = <&gpio 42 0>;
				                //#LYNQ_MODFIY modify for task-1618 2025/6/19 start
				                power-en-gpio = <&gpio 32 1>;
				                //#LYNQ_MODFIY modify for task-1618 2025/6/19 end
						phy-mode = "rgmii";
				//		tx_rx_delay = <0xb 0x0>; /* 150ps per step*/
					};

					/* YT8512B  10M/100M 3.3V RMII PHY */
				//	phy3: phy@3 {
					//	compatible = "ethernet-phy-ieee802.3-c22";
				//		device_type = "ethernet-phy";
				//		reg = <0x3>; /* set phy address*/
				//		phy-mode = "rmii";
				//		driver_strength = <0x3>;
				//	};

					/* IP175D  10M/100M 3.3V RMII SWITCH */
					phy1: phy@1 {
						compatible = "ethernet-phy-ieee802.3-c22";
						device_type = "ethernet-phy";
						reg = <0x1>; /* set phy address*/
						phy-mode = "rmii";
					};


					/* jl 3103 phy */
					phy3: phy@3 {
						compatible = "ethernet-phy-ieee802.3-c22";
						device_type = "ethernet-phy";
						reg = <0x3>; /* set phy address*/
						phy-mode = "rgmii-id";
						lynq,jl3103=<100 0>;
					};
				};
			};
			qspi: spi@0xd420b000 {
				asr,qspi-freq = <78000000>;
				status = "okay";
			};

#if 0
			/* SD card */
			sdh0: sdh@d4280000 {
				pinctrl-names = "default", "slow", "fast", "sleep";
				pinctrl-0 = <&sdh0_pmx_func1 &sdh0_pmx_func2 &sdh0_pmx_func3>;
				pinctrl-1 = <&sdh0_pmx_func1_slow &sdh0_pmx_func2_slow &sdh0_pmx_func3>;
				pinctrl-2 = <&sdh0_pmx_func1_fast &sdh0_pmx_func2_fast &sdh0_pmx_func3>;
				pinctrl-3 = <&sdh0_pmx_cd_wakeup>;
				/*
				 * Genernal use, juse set vmmc-supply and vqmmc-supply
				 * 	vmmc-supply = <&supply1>
				 * 	vqmmc-supply = <&supply2>
				 *
				 * For compatibility, to select one from two supply source
				 *	vmmc-supply = <&supply1 &supply1_backup>;
				 *	vqmmc-supply = <&supply2 &supply2_backup>;
				 *	vmmc2-supply = <&supply1_backup &supply1>;
				 *	vqmmc2-supply = <&supply2_backup &supply2>;
				 */
				vmmc-supply = <&vcc_sdh1>;
				vqmmc-supply = <&pm802ldo6 &pm803ldo8>;
#ifndef CONFIG_ASR_DSDS
				vmmc2-supply = <&vcc_sdh1 &pm802ldo4>;
				vqmmc2-supply = <&pm803ldo8 &pm802ldo6>;
#endif
				bus-width = <4>;
				no-mmc;
				no-sdio;
				/*non-removable;
				broken-cd;*/
				wp-inverted;
				asr,sdh-pm-runtime-en;
				asr,sdh-host-caps-disable = <(MMC_CAP_UHS_SDR104)>;
#if 1 /* CD via gpio */
				//cd-gpios = <&gpio 90 1>;
				asr,sdh-quirks2 = <(
					SDHCI_QUIRK2_SET_AIB_MMC |
					SDHCI_QUIRK2_PRESET_VALUE_BROKEN
					)>;
				asr,sdh-host-caps = <(
					MMC_CAP_CD_WAKE
					)>;
				asr,sdh-quirks = <(
					SDHCI_QUIRK_BROKEN_CARD_DETECTION |
					SDHCI_QUIRK_BROKEN_TIMEOUT_VAL
					)>;
#else  /* CD via SDH */
				asr,sdh-quirks = <(
					SDHCI_QUIRK_BROKEN_TIMEOUT_VAL
					)>;
				asr,sdh-quirks2 = <(
					SDHCI_QUIRK2_SET_AIB_MMC |
					SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
					SDHCI_QUIRK2_BASE_CLOCK_ALWAYS_ON
					)>;
#endif
				/* prop "sdh-dtr-data":
				   <timing preset_rate src_rate tx_delay rx_delay tx_dline_reg rx_dline_reg> */
				asr,sdh-dtr-data =
					<PXA_MMC_TIMING_LEGACY PXA_SDH_DTR_26M PXA_SDH_DTR_104M 0 0 0 0>,
					<PXA_MMC_TIMING_SD_HS PXA_SDH_DTR_52M PXA_SDH_DTR_104M 0 0 0 0>,
					<PXA_MMC_TIMING_UHS_DDR50 PXA_SDH_DTR_52M PXA_SDH_DTR_104M 0 0 0 3>,
					<PXA_MMC_TIMING_UHS_SDR50 PXA_SDH_DTR_104M PXA_SDH_DTR_208M 0 0 0 0>,
					<PXA_MMC_TIMING_UHS_SDR104 PXA_SDH_DTR_208M PXA_SDH_DTR_208M 0 0 0 0>,
					<PXA_MMC_TIMING_MAX PXA_SDH_DTR_PS_NONE PXA_SDH_DTR_104M 0 0 0 0>;
				status = "okay";
			};
#endif
			/* EMMC*/
            sdh0: sdh@d4280000 {
                pinctrl-names = "default", "slow", "fast";
                pinctrl-0 = <&sdh0_pmx_func1 &sdh0_pmx_func2 &sdh0_pmx_func3>;
                pinctrl-1 = <&sdh0_pmx_func1_slow &sdh0_pmx_func2_slow &sdh0_pmx_func3>;
                pinctrl-2 = <&sdh0_pmx_func1_fast &sdh0_pmx_func2_fast &sdh0_pmx_func3>;
                vmmc-supply = <&pm803ldo6 &pm803ldo8>;
                bus-width = <4>;
                no-sdio;
                no-sd;
                non-removable;
                broken-cd;
                wp-inverted;
                asr,sdh-pm-runtime-en;
                cap-mmc-highspeed;
                mmc-ddr-1_8v;
                asr,sdh-host-caps-disable = <(MMC_CAP_1_2V_DDR)>;
                asr,sdh-host-caps2-disable = <(MMC_CAP2_HSX00_1_2V | MMC_CAP2_HS400 |MMC_CAP2_HS200)>;
                asr,sdh-host-caps2 = <(
                    MMC_CAP2_ONLY_1_8V
                    )>;
                asr,sdh-quirks = <(
                    SDHCI_QUIRK_BROKEN_CARD_DETECTION |
                    SDHCI_QUIRK_BROKEN_TIMEOUT_VAL
                    )>;
                asr,sdh-quirks2 = <(
                    SDHCI_QUIRK2_SET_AIB_MMC |
                    SDHCI_QUIRK2_PRESET_VALUE_BROKEN
                    )>;
                /* prop "sdh-dtr-data":
                   <timing preset_rate src_rate tx_delay rx_delay tx_dline_reg rx_dline_reg> */
                asr,sdh-dtr-data =
                    <PXA_MMC_TIMING_LEGACY PXA_SDH_DTR_26M PXA_SDH_DTR_104M 0 0 0 0>,
                    <PXA_MMC_TIMING_MMC_HS PXA_SDH_DTR_52M PXA_SDH_DTR_104M 0 0 0 0>,
                    <PXA_MMC_TIMING_MMC_DDR52 PXA_SDH_DTR_52M PXA_SDH_DTR_104M 0 0 0 3>,
                    <PXA_MMC_TIMING_MMC_HS200 PXA_SDH_DTR_208M PXA_SDH_DTR_208M 53 0 0 0>,
                    <PXA_MMC_TIMING_MAX PXA_SDH_DTR_PS_NONE PXA_SDH_DTR_89M 0 0 0 0>;
                status = "okay";
            };

			/* SDIO */
			sdh1: sdh@d4280800 {
				pinctrl-names = "default", "fast", "sleep";
				pinctrl-0 = <&sdh1_pmx_func1 &sdh1_pmx_func2>;
				pinctrl-1 = <&sdh1_pmx_func1_fast &sdh1_pmx_func2_fast>;
			/*	pinctrl-2 = <&sdh1_pmx_edge_wakeup>;*/
				bus-width = <4>;
				no-mmc;
				no-sd;
				non-removable;
				keep-power-in-suspend;
				enable-sdio-wakeup;
				/* clk-scaling-config:
				   <up_threshold down_threshold polling_interval> */
				clk-scaling-config = <25 12 200>;
				min-ddr-qos = <156000 312000 400000>;
				asr,sdh-pm-runtime-en;
				asr,sdh-quirks = <(
					SDHCI_QUIRK_BROKEN_CARD_DETECTION |
					SDHCI_QUIRK_BROKEN_TIMEOUT_VAL
					)>;
				asr,sdh-quirks2 = <(
					SDHCI_QUIRK2_NO_TIMER_RETUNING |
					SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
					SDHCI_QUIRK2_BASE_CLOCK_ALWAYS_ON
					)>;
				asr,sdh-pm-caps = <(MMC_PM_KEEP_POWER)>;
				asr,sdh-host-caps2 = <(
					MMC_CAP2_ONLY_1_8V |
					MMC_CAP2_DISABLE_PROBE_CDSCAN |
					MMC_CAP2_CLK_SCALE |
					MMC_CAP2_BUS_CLK_NO_SCALE
					)>;
				/* prop "sdh-dtr-data":
				   <timing preset_rate src_rate tx_delay rx_delay tx_dline_reg rx_dline_reg> */
				asr,sdh-dtr-data =
					<PXA_MMC_TIMING_LEGACY PXA_SDH_DTR_26M PXA_SDH_DTR_104M 0 0 0 0>,
					<PXA_MMC_TIMING_SD_HS PXA_SDH_DTR_45M PXA_SDH_DTR_89M 0 0 0 0>,
					<PXA_MMC_TIMING_UHS_DDR50 PXA_SDH_DTR_52M PXA_SDH_DTR_104M 0 0 0 3>,
					<PXA_MMC_TIMING_UHS_SDR50 PXA_SDH_DTR_83M PXA_SDH_DTR_83M 0 0 0 3>,
					//<PXA_MMC_TIMING_UHS_SDR104 PXA_SDH_DTR_208M PXA_SDH_DTR_208M 0 0 0 0>,
					<PXA_MMC_TIMING_UHS_SDR104 PXA_SDH_DTR_52M PXA_SDH_DTR_52M 0 0 0 0>,
					<PXA_MMC_TIMING_MAX PXA_SDH_DTR_PS_NONE PXA_SDH_DTR_89M 0 0 0 0>;
				status = "okay";
			};
			pcie0: pcie@0xd4288000{
				reset-gpios = <&gpio 42 0 >;
				status = "disbabled";
			};
			pciephy0: pcie-phy@d4206000 {
				status = "okay";
			};
		};

		apb@d4000000 {
			ssp_dai1: pxa-ssp-dai@1 {
				compatible = "asr,pxa-ssp-dai";
				reg = <0x1 0x0>;

				port = <&ssp1>;
				pinctrl-names = "default","ssp";
				pinctrl-0 = <&i2s_gpio>;
				pinctrl-1 = <&i2s_func>;
				ssp-gpio = <&gpio 25 0 &gpio 26 0 &gpio 27 0 &gpio 28 0>;

				dmas = <&pdma0 54 1
					&pdma0 55 1>;
				dma-names = "rx", "tx";

				platform_driver_name = "pdma_platform";
				burst_size = <4>;
				playback_period_bytes = <2048>;
				playback_buffer_bytes = <4096>;
				capture_period_bytes = <2048>;
				capture_buffer_bytes = <4096>;
			};
			mfpr: mfpr@d401e000 {
				status = "okay";
				/* intend to replace lpm-board-cfg
				no-apbsd-in-d1pp = <0x1>; //"wakeup-state-d1pp"
				pin1:pin1@d401e01B0 {
					offset = <0x1B0>;
					udr-cfg = <0xA040>;
				};
				pin2:pin2@d401e01B4 {
					offset = <0x1B4>;
					udr-cfg = <0xA040>;
				};
				*/
			};
			timer0: timer@d4014000 {
				status = "okay";
			};
			uart1: uart@d4017000 {	/* nezhas evb use ap uart */
				pinctrl-names = "default","sleep";
				pinctrl-0 = <&uart1_pmx_func1 &uart1_pmx_func2>;
				pinctrl-1 = <&uart1_pmx_func1_sleep &uart1_pmx_func2>;
				//edge-wakeup-gpio = <&gpio 29 0>; /* GPIO29: AP UART rx pin */
				status = "okay";
			};
			uart2: uart@d4036000 {
				pinctrl-names = "default";

				//#LYNQ_MODFIY modify for task-1618 2025/6/11 start
				pinctrl-0 = <&gps_pmx_uart_rxd &gps_pmx_uart_txd>; //&gps_pmx_func_cts_rts>;
				//#LYNQ_MODFIY modify for task-1618 2025/6/11 end
				status = "okay";
			};
			uart3: uart@d4018000 {
				pinctrl-names = "default";
				pinctrl-0 = <&uart3_pmx_func>;
				status = "okay";
			};
			uart4: uart@d401f000 {
				pinctrl-names = "default";
				pinctrl-0 = <&uart4_pmx_func>; /*BAUD :9600*/
				/*pinctrl-0 = <&uart4_pmx_func_rxd &uart4_pmx_func_txd &uart4_pmx_func_cts_rts>;*/
				status = "okay";
			};
			rtc: rtc@d4010000 {
				status = "okay";
			};
			pmx: pinmux@d401e000 {
				/* pin base = base_addr / 4, nr pins & gpio function */
				pinctrl-single,gpio-range = <
					/*
					 * GPIO number is hardcoded for range at here.
					 * In gpio chip, GPIO number is not hardcoded for range.
					 * Since one gpio pin may be routed to multiple pins,
					 * define these gpio range in pxa910-dkb.dts not pxa910.dtsi.
					 */
					/*&range 80 4 0 */	/* GPIO25 ~ GPIO28 */
					&range 55 32 0	/* GPIO0 ~ GPIO31 */
					&range 87 32 0	/* GPIO32 ~ GPIO63 */
					&range 119 32 0  /* GPIO64 ~ GPIO95 */
					&range 151 32 0  /* GPIO96 ~ GPIO127 */
				>;

				ssp0_pmx_func: ssp0_pmx_func {
					pinctrl-single,pins = <
						GPIO36 AF1 /* TXD */
						GPIO35 AF1 /* RXD */
						GPIO34 AF1 /* FRM */
						/*GPIO34 AF0*/ /* FRM *//* DXS101 Use the config of Cs-gpios */
						GPIO33 AF1 /* SCLK */
					>;
					DS_SLOW0;PULL_NONE;EDGE_NONE;SL_NORMAL; //DS_MEDIUM modify for overvoltage
				};
				ssp2_pmx_func: ssp2_pmx_func {
					pinctrl-single,pins = <
						GPIO37 AF3 /* TXD */
						GPIO38 AF3 /* SCLK */
						GPIO39 AF3 /* FRM */
						GPIO40 AF3 /* RXD */
					>;
					DS_SLOW0;PULL_NONE;EDGE_NONE;SL_NORMAL;  //DS_MEDIUM modify for overvoltage
				};
				lcd_bl_func: lcd_bl_func {
					pinctrl-single,pins = <
					/*	VCXO_OUT AF1	 GPIO126, lcd bl */
					/* 	GPIO24	AF0		 reset */
					/* 	GPIO22	AF0 	lcd d/c */
					>;
					MFP_DEFAULT;
				};
				uart1_pmx_func1: uart1_pmx_func1 {
					pinctrl-single,pins = <
						GPIO29 AF1
					>;
					MFP_DEFAULT;
				};
				uart1_pmx_func2: uart1_pmx_func2 {
					pinctrl-single,pins = <
						GPIO30 AF1
					>;
					MFP_DEFAULT;
				};
				uart1_pmx_func1_sleep: uart1_pmx_func1_sleep {
					pinctrl-single,pins = <
						GPIO29 AF1
					>;
					DS_MEDIUM;PULL_NONE;EDGE_NONE;SL_NORMAL;
				};
				twsi0_pmx_func: twsi0_pmx_func {
					pinctrl-single,pins = <
						GPIO49 AF1
						GPIO50 AF1
					>;
					DS_MEDIUM;PULL_NONE;EDGE_NONE;LPM_FLOAT;
				};
				twsi0_pmx_gpio: twsi0_pmx_gpio {
					pinctrl-single,pins = <
						GPIO49 AF0
						GPIO50 AF0
					>;
					DS_MEDIUM;PULL_NONE;EDGE_NONE;LPM_FLOAT;
				};
#if 1
				twsi1_pmx_func: twsi1_pmx_func {
					pinctrl-single,pins = <
						GPIO10 AF1
						GPIO11 AF1
					>;
					DS_SLOW0;PULL_NONE;EDGE_NONE;LPM_FLOAT;
				};
				twsi1_pmx_gpio: twsi1_pmx_gpio {
					pinctrl-single,pins = <
						GPIO10 AF0
						GPIO11 AF0
					>;
					DS_SLOW0;PULL_NONE;EDGE_NONE;LPM_FLOAT;
				};
#endif
				/* no pull, no LPM */
				dvc_pmx_func: dvc_pmx_func {
					/* hw-dvc */
					pinctrl-single,pins = <
						TDS_DIO0 AF0
						TDS_DIO1 AF0
					>;
					DS_MEDIUM;PULL_FLOAT;EDGE_NONE;SL_NORMAL;
				};
				leds_pmx_func: leds_pmx_func {
					pinctrl-single,pins = <
						DF_IO10 AF1
						DF_IO11 AF1
						DF_IO12 AF1
					>;
					DS_MEDIUM;PULL_FLOAT;EDGE_NONE;SL_NORMAL;
				};

				gps_pmx_onoff: gps_pmx_onoff {
					pinctrl-single,pins = <
						TDS_TXREV AF1
					>;
					DS_MEDIUM;PULL_DOWN;EDGE_NONE;SL_NORMAL;
				};
				gps_pmx_reset: gps_pmx_reset {
					pinctrl-single,pins = <
						TDS_RXON AF1
					>;
					DS_MEDIUM;PULL_DOWN;EDGE_NONE;SL_NORMAL;
				};
				
				//zqy
				gnss_clk_on: gnss_clk_on {
					pinctrl-single,pins = <
						GPIO43 AF2  /*32K CLK */
									
						/*VCXO_REQ AF1  GPIO[125] GPS_WAKE_HOST */
						GPIO47  AF0  /* HOST_WAKE_GPS */
						GPIO45 AF0   /*RESET */
						CLK_REQ AF1   /*sleep en*/
					
					>;
					DS_MEDIUM;PULL_NONE;EDGE_NONE;SL_LOW;
				};
				gps_pmx_uart_rxd: gps_pmx_uart_rxd {
					/* gps dedicated uart */
					pinctrl-single,pins = <
						GPIO51 AF1

						//#LYNQ_MODFIY modify for task-1618 2025/6/11 start
						/*GPIO32 AF1*/
						//#LYNQ_MODFIY modify for task-1618 2025/6/11 end
					>;
					DS_MEDIUM;PULL_NONE;EDGE_NONE;SL_NORMAL;
				};
				gps_pmx_uart_txd: gps_pmx_uart_txd {
					/* gps dedicated uart */
					pinctrl-single,pins = <
						GPIO52 AF1
						//#LYNQ_MODFIY modify for task-1618 2025/6/11 start
						/*GPIO31 AF1*/
						//#LYNQ_MODFIY modify for task-1618 2025/6/11 end
					>;
					DS_MEDIUM;PULL_NONE;EDGE_NONE;SL_NORMAL;
				};
				 gps_pmx_func_cts_rts: gps_pmx_func_cts_rts {
					pinctrl-single,pins = <
						GPIO31 AF1  /* cts */
						GPIO32 AF1  /* rts */
					>;
					DS_MEDIUM;PULL_NONE;EDGE_NONE;SL_NORMAL;
				};
		
				uart3_pmx_func: uart3_pmx_func {
					pinctrl-single,pins = <
						GPIO53 AF1 /* RX */
					/*	GPIO54 AF1  TX */
					>;
					MFP_PULL_DOWN;
				};


				uart4_pmx_func_rxd: uart4_pmx_func_rxd {
					pinctrl-single,pins = <
						GPIO37 AF2
						GPIO40 AF2
					>;
					DS_MEDIUM;PULL_NONE;EDGE_NONE;SL_NORMAL;
				};
				uart4_pmx_func_txd: uart4_pmx_func_txd {
					pinctrl-single,pins = <
						GPIO38 AF2
						GPIO39 AF2
					>;
					DS_MEDIUM;PULL_NONE;EDGE_NONE;SL_NORMAL;
				};

				uart4_pmx_func_cts_rts: uart4_pmx_func_cts_rts {
					pinctrl-single,pins = <
						GPIO39 AF2
						GPIO40 AF2
					>;
					DS_MEDIUM;PULL_NONE;EDGE_NONE;SL_NORMAL;
				};
				uart4_pmx_func: uart4_pmx_func {
					pinctrl-single,pins = <
						GPIO44 AF1  /* RX */
						GPIO45 AF1  /* TX */
					>;
					DS_MEDIUM;PULL_NONE;EDGE_NONE;SL_NORMAL;
				};
				panel_rst_func: panel_rst_func {
					pinctrl-single,pins = <
						DF_nCS1	AF1
					>;
					DS_MEDIUM;PULL_FLOAT;EDGE_NONE;SL_NORMAL;
				};

				sd_ldo_en: sd_ldo_en {
					pinctrl-single,pins = <
						GPIO45 AF0
					>;
					MFP_PULL_DOWN;
				};
				sdh0_pmx_func1: sdh0_pmx_func1 {
					pinctrl-single,pins = <
						MMC1_DAT3 AF0
						MMC1_DAT2 AF0
						MMC1_DAT1 AF0
						MMC1_DAT0 AF0
						MMC1_CMD AF0
					>;
					DS_MEDIUM;PULL_NONE;EDGE_NONE;SL_NORMAL;
				};
				sdh0_pmx_func2: sdh0_pmx_func2 {
					pinctrl-single,pins = <
						MMC1_CLK AF0
					>;
					DS_MEDIUM;PULL_NONE;EDGE_NONE;
				};
				sdh0_pmx_func3: sdh0_pmx_func3 {
					pinctrl-single,pins = <
						MMC1_CD AF1
					>;
					DS_MEDIUM;PULL_UP;EDGE_NONE;SL_NORMAL;
				};
				sdh0_pmx_cd_wakeup: sdh0_pmx_func1_cd_wakeup {
					pinctrl-single,pins = <
						MMC1_CD AF1
					>;
					DS_MEDIUM;PULL_UP;EDGE_BOTH;SL_NORMAL;
				};
				sdh0_pmx_func1_slow: sdh0_pmx_func1_slow {
					pinctrl-single,pins = <
						MMC1_DAT3 AF0
						MMC1_DAT2 AF0
						MMC1_DAT1 AF0
						MMC1_DAT0 AF0
						MMC1_CMD AF0
					>;
					DS_FAST0;PULL_NONE;EDGE_NONE;SL_NORMAL;
				};
				sdh0_pmx_func2_slow: sdh0_pmx_func2_slow {
					pinctrl-single,pins = <
						MMC1_CLK AF0
					>;
					DS_FAST0;PULL_NONE;EDGE_NONE;
				};
				sdh0_pmx_func1_fast: sdh0_pmx_func1_fast {
					pinctrl-single,pins = <
						MMC1_DAT3 AF0
						MMC1_DAT2 AF0
						MMC1_DAT1 AF0
						MMC1_DAT0 AF0
						MMC1_CMD AF0
					>;
					DS_FAST1;PULL_NONE;EDGE_NONE;SL_NORMAL;
				};
				sdh0_pmx_func2_fast: sdh0_pmx_func2_fast {
					pinctrl-single,pins = <
						MMC1_CLK AF0
					>;
					DS_FAST1;PULL_NONE;EDGE_NONE;
				};
				sdh1_pmx_func1_fast: sdh1_pmx_func1_fast {
					pinctrl-single,pins = <
						TDS_DIO13 AF0 /* WLAN_DAT3 */
						TDS_DIO14 AF0 /* WLAN_DAT2 */
						TDS_DIO15 AF0 /* WLAN_DAT1 */
						TDS_DIO16 AF0 /* WLAN_DAT0 */
						TDS_DIO17 AF0 /* WLAN_CMD */
					>;
					DS_FAST0;PULL_NONE;EDGE_NONE;SL_NORMAL;
				};
				sdh1_pmx_func2_fast: sdh1_pmx_func2_fast {
					pinctrl-single,pins = <
						TDS_DIO18 AF0 /* WLAN_CLK */
					>;
					DS_FAST0;PULL_DOWN;EDGE_NONE;SL_NORMAL;
				};
				sdh1_pmx_func1: sdh1_pmx_func1 {
					pinctrl-single,pins = <
						TDS_DIO13 AF0 /* WLAN_DAT3 */
						TDS_DIO14 AF0 /* WLAN_DAT2 */
						TDS_DIO15 AF0 /* WLAN_DAT1 */
						TDS_DIO16 AF0 /* WLAN_DAT0 */
						TDS_DIO17 AF0 /* WLAN_CMD */
					>;
					DS_MEDIUM;PULL_NONE;EDGE_NONE;SL_LOW;
				};
				sdh1_pmx_func2: sdh1_pmx_func2 {
					pinctrl-single,pins = <
						TDS_DIO18 AF0 /* WLAN_CLK */
					>;
					DS_MEDIUM;PULL_DOWN;EDGE_NONE;SL_LOW;
				};
				sdh1_pmx_func3: sdh1_pmx_func3 {
					pinctrl-single,pins = <
						GPIO10 AF0 /* VCXO_REQ AF1 WLAN_WAKE_HOST */
					>;
					MFP_PULL_DOWN;
				};
				sdh1_pmx_edge_wakeup: sdh1_pmx_edge_wakeup {
					pinctrl-single,pins = <
						GPIO10 AF0 /* VCXO_REQ AF1 */
					>;
					DS_MEDIUM;PULL_DOWN;EDGE_RISE;SL_NORMAL;
				};
				sdh1_pmx_pd_rst_off: sdh1_pmx_pd_rst_off {
					pinctrl-single,pins = <
					/*	GPIO11 AF0  GPIO31  AF0 WLAN_PDn */
					/*	GPIO08 AF0  GPIO32  AF0 LDO_EN */
						MMC1_CD AF1
					>;
					MFP_PULL_DOWN;
				};
				sdh1_pmx_pd_rst_on: sdh1_pmx_pd_rst_on {
					pinctrl-single,pins = <
					 /*	GPIO11 AF0 GPIO31  AF0 WLAN_PDn */
					 /*	GPIO08 AF0  GPIO32  AF0 LDO_EN */
						MMC1_CD AF1
					>;
					MFP_PULL_UP;
				};
				
				
				mbtk_sdh_pmx_off: mbtk_sdh_pmx_off {
					pinctrl-single,pins = <
						VCXO_REQ AF1  //gpio125 wlan en
						GPIO123 AF1   //wlan pwr en
						/*VCXO_OUT  AF1  /*gpio127   wifi wake*/
					>;
					MFP_PULL_DOWN;
				};
				mbtk_sdh_pmx_on: mbtk_sdh_pmx_on {
					pinctrl-single,pins = <
						VCXO_REQ AF1  //gpio125 wlan en
						GPIO123 AF1   //wlan pwr en
						/*VCXO_OUT  AF1  /*gpio127   wifi wake*/
					>;
					MFP_PULL_UP;
				};
				alc5616_pmx_func1: alc5616_pmx_func1 {
					pinctrl-single,pins = <
					/* 	GPIO08   AF0 AP_UART1_DCD_N -> CODEC_IRQ */
						GPIO20   AF7 /* MCLK:I2S_SYSCLK */
					>;
					MFP_DEFAULT;
				};
				alc5616_pmx_func2: alc5616_pmx_func2 {
					pinctrl-single,pins = <
					 /*	GPIO08   AF0 AP_UART1_DCD_N -> CODEC_IRQ */
						GPIO20   AF7 /* MCLK:I2S_SYSCLK */
					>;
					MFP_DEFAULT;
				};
        
     			es8311_pa_func1: es8311_pa_func1 {
					pinctrl-single,pins = <
						GPIO20   AF7 /* MCLK:I2S_SYSCLK */
						GPIO54   AF0 /* CODEC_VDDD_EN */
						GPIO24   AF0 /* NAD_PA_PWR_EN */
					>;
					MFP_DEFAULT;
				};
				es8311_pa_func2: es8311_pa_func2 {
					pinctrl-single,pins = <
						GPIO20   AF7 /* MCLK:I2S_SYSCLK */
						GPIO54   AF0 /* CODEC_VDDD_EN */
						GPIO24   AF0 /* NAD_PA_PWR_EN */
					>;
					MFP_DEFAULT;
				};
				audio_pa_pmx_func: audio_pa_pmx_func {
					pinctrl-single,pins = <
						GPIO14   AF0 /* PA */
					>;
					MFP_DEFAULT;
				};
				ecall_pmx_func: ecall_pmx_func {
					pinctrl-single,pins = <
						GPIO08 AF0  /* auto mode ecall */
						GPIO09 AF0  /* manual mode ecall */
					>;
					MFP_DEFAULT;
				};
				slic_pmx_func1: slic_pmx_func1 {
					pinctrl-single,pins = <
						GPIO20	AF0 	/* SLIC_INT, GPIO20 */
						VCXO_OUT AF1 /* GPIO127, SLIC_3V3LDO_EN/LCD_BK_EN */
					>;
					MFP_DEFAULT;
				};
				slic_pmx_func2: slic_pmx_func2 {
					pinctrl-single,pins = <
						GPIO21 AF0 /* SLIC_RESET, GPIO21 */
					>;
					MFP_DEFAULT;
				};
				slic_pmx_func1_sleep: slic_pmx_func1_sleep {
					pinctrl-single,pins = <
						GPIO20	AF0 	/* SLIC_INT, GPIO20 */
					>;
					DS_MEDIUM;PULL_UP;EDGE_BOTH;SL_NORMAL;
				};

				otg_vbus_func: otg_vbus_func {
					pinctrl-single,pins = <
					 /*	VBUS_DRV AF1 GPIO[122] */
					>;
					DS_MEDIUM;PULL_DOWN;EDGE_NONE;
				};

				emac_pmx_func0: emac_pmx_func0 {
					pinctrl-single,pins = <
						GPIO00 AF1 /* GMAC1_RX_DV */
						GPIO01 AF1 /* GMAC1_RX_D0 */
						GPIO02 AF1 /* GMAC1_RX_D1 */
						GPIO03 AF1 /* GMAC1_RX_CLK */
						/* GPIO04 AF1 GMAC1_RX_D2 */
						/* GPIO05 AF1 GMAC1_RX_D3 */
						GPIO06 AF1 /* GMAC1_TX_D0 */
						GPIO07 AF1 /* GMAC1_TX_D1 */
						/* GPIO12 AF1 GMAC1_TX_CLK */
						/* GPIO13 AF1 GMAC1_TX_D2 */
						/* GPIO14 AF1 GMAC1_TX_D3 */
						GPIO15 AF1 /* GMAC1_TX_EN */
						GPIO16 AF1 /* GMAC1_TX_MDC */
						/* GPIO17 AF1 GMAC1_TX_MDIO */
					>;
					DS_MEDIUM;PULL_DOWN;EDGE_NONE;SL_NORMAL;
				};
				emac_pmx_func1: emac_pmx_func1 {
					pinctrl-single,pins = <
						GPIO04 AF1 /* GMAC1_RX_D2 */
						GPIO05 AF1 /* GMAC1_RX_D3 */
						GPIO12 AF1 /* GMAC1_TX_CLK */
						GPIO13 AF1 /* GMAC1_TX_D2 */
						GPIO14 AF1 /* GMAC1_TX_D3 */
					>;
					DS_MEDIUM;PULL_DOWN;EDGE_NONE;SL_NORMAL;
				};
				emac_pmx_func2: emac_pmx_func2 {
					pinctrl-single,pins = <
						GPIO17 AF1 /* GMAC1_TX_MDIO */
						GPIO18 AF1 /* GMAC1_TX_INT_N */
					>;
					DS_MEDIUM;PULL_UP;EDGE_NONE;SL_NORMAL;
				};
				
				emac_pmx_func0_slp: emac_pmx_func0_slp {
					pinctrl-single,pins = <
						GPIO00 AF1 /* GMAC1_RX_DV */
						GPIO01 AF1 /* GMAC1_RX_D0 */
						GPIO02 AF1 /* GMAC1_RX_D1 */
						GPIO03 AF1 /* GMAC1_RX_CLK */
						/* GPIO04 AF1 GMAC1_RX_D2 */
						/* GPIO05 AF1 GMAC1_RX_D3 */
						GPIO06 AF1 /* GMAC1_TX_D0 */
						GPIO07 AF1 /* GMAC1_TX_D1 */
						/* GPIO12 AF1 GMAC1_TX_CLK */
						/* GPIO13 AF1 GMAC1_TX_D2 */
						/* GPIO14 AF1 GMAC1_TX_D3 */
						GPIO15 AF1 /* GMAC1_TX_EN */
						GPIO16 AF1 /* GMAC1_TX_MDC */
						/* GPIO17 AF1 GMAC1_TX_MDIO */
					>;
					DS_OFF;PULL_DOWN;EDGE_NONE;SL_NORMAL;
				};
				
				emac_pmx_func1_slp: emac_pmx_func1_slp {
					pinctrl-single,pins = <
						GPIO04 AF1 /* GMAC1_RX_D2 */
						GPIO05 AF1 /* GMAC1_RX_D3 */
						GPIO12 AF1 /* GMAC1_TX_CLK */
						GPIO13 AF1 /* GMAC1_TX_D2 */
						GPIO14 AF1 /* GMAC1_TX_D3 */
					>;
					DS_OFF;PULL_DOWN;EDGE_NONE;SL_NORMAL;
				};
				emac_pmx_func2_slp: emac_pmx_func2_slp {
					pinctrl-single,pins = <
						GPIO17 AF1 /* GMAC1_TX_MDIO */
						GPIO18 AF1 /* GMAC1_TX_INT_N */
					>;
					DS_OFF;PULL_DOWN;EDGE_NONE;SL_NORMAL;
				};

				emac_pmx_func3: emac_pmx_func3 {
					pinctrl-single,pins = <
						GPIO42 AF0 /* RESET */
						//#LYNQ_MODFIY modify for task-1618 2025/6/19 start
                                                GPIO32 AF0 /* POWER EN */
						//#LYNQ_MODFIY modify for task-1618 2025/6/19 end
					/*	GPIO40 AF0  LDO_EN */
					>;
					DS_SLOW0;PULL_FLOAT;EDGE_NONE;SL_NORMAL;
				};
				usim1_pmx_func: usim1_pmx_func {
					pinctrl-single,pins = <
						PRI_TCK AF1
					>;
					DS_MEDIUM;PULL_UP;EDGE_NONE;SL_NORMAL;
				};
				usim1_pmx_func_sleep: usim1_pmx_func_sleep {
					pinctrl-single,pins = <
						PRI_TCK AF1
					>;
					DS_MEDIUM;PULL_UP;EDGE_BOTH;SL_NORMAL;
				};
				usim2_pmx_func: usim2_pmx_func {
					pinctrl-single,pins = <
						GPIO44 AF0
					>;
					DS_MEDIUM;PULL_UP;EDGE_NONE;SL_NORMAL;
				};
				usim2_pmx_func_sleep: usim2_pmx_func_sleep {
					pinctrl-single,pins = <
						GPIO44 AF0
					>;
					DS_MEDIUM;PULL_UP;EDGE_BOTH;SL_NORMAL;
				};
				pcie_pmx_pd_rst_off: pcie_pmx_pd_rst_off {
					pinctrl-single,pins = <
						GPIO42 AF0	/* PERST_N */
						GPIO24 AF0 	/* DC_EN */
					>;
					MFP_PULL_DOWN;
				};
				pcie_pmx_pd_rst_on: pcie_pmx_pd_rst_on {
					pinctrl-single,pins = <
						GPIO42 AF0	/* PERST_N */
						GPIO24 AF0	/* DC_EN */
					>;
					MFP_PULL_UP;
				};
				pin_func_work: pin_func_work {
					pinctrl-single,pins = <  
					
   						GPIO08 AF0   /*T108 status led* /
					
						VBUS_DRV AF2 /*32k*/
       
					
						GPIO46 AF0    /*wifi en*/
						
						GPIO19 AF0 /*bt en*/

					>;
					MFP_DEFAULT;
				};

			
				sc_ext_int0: sc_ext_int0 {
					pinctrl-single,pins = <
						GPIO21 AF0 
					>;
					DS_MEDIUM;PULL_NONE;EDGE_BOTH;SL_NORMAL;
				};
				sc_ext_int1: sc_ext_int1 {
					pinctrl-single,pins = <
						GPIO22 AF0 
					>;
					MFP_DEFAULT;
				};

					sc_ext_int2: sc_ext_int2 {
					pinctrl-single,pins = <
						GPIO23 AF0 
					>;
					MFP_DEFAULT;
				};


				sc_ext_int3: sc_ext_int3 {
					pinctrl-single,pins = <
						GPIO24 AF0
					>;
					MFP_DEFAULT;
				};


				mbtk_plat_irq_func: mbtk_plat_irq_func {
					pinctrl-single,pins = <
					
						/*GPIO21 AF0 
						GPIO22 AF0 */
						GPIO23 AF0 
						GPIO24 AF0
						
					>;
					DS_MEDIUM;PULL_NONE;EDGE_NONE;SL_NORMAL;
				};
				mbtk_plat_irq_func_sleep: mbtk_plat_irq_func_sleep {
					pinctrl-single,pins = <
						/*GPIO21 AF0 
						GPIO22 AF0*/
						GPIO23 AF0 
						GPIO24 AF0
					>;
					DS_MEDIUM;PULL_NONE;EDGE_BOTH;SL_NORMAL;
				};


				gpiokey_pmx_func: gpiokey_pmx_func {
					pinctrl-single,pins = <
						GPIO09 AF0
					>;
					DS_MEDIUM;PULL_UP;EDGE_NONE;SL_NORMAL;
				};

				/*for ssp2 is not in use, it needs to be used as a regular gpio,default state is input and low*/
				gpiokey_ssp2_func: gpiokey_ssp2_func {
					pinctrl-single,pins = <
						GPIO37 AF0 /* TXD */
						GPIO38 AF0 /* SCLK */
						GPIO39 AF0 /* FRM */
						GPIO40 AF0 /* RXD */
					>;
					DS_MEDIUM;PULL_DOWN;EDGE_NONE;SL_NORMAL;
				};

				wake_pmx_func1: wake_pmx_func1 {
					pinctrl-single,pins = <
						USB_ID AF1
					>;
					DS_MEDIUM;PULL_NONE;EDGE_NONE;SL_NORMAL;
				};

				led_pmx_func1: led_pmx_func1 {
					pinctrl-single,pins = <
						GPIO08 AF0
					>;
					DS_MEDIUM;PULL_NONE;EDGE_NONE;SL_NORMAL;
				};


                wake_pmx_func: wake_pmx_func {
					pinctrl-single,pins = <
						PRI_TDI AF1  /*GPIO117 WAKEUP_OUT*/
				 
						PRI_TMS AF1  /*GPIO118 WAKEUP_IN*/
						GPIO41  AF0  
						PRI_TDO AF1  /*GPIO120*/
			
						
					>;
					DS_MEDIUM;PULL_NONE;EDGE_NONE;SL_NORMAL;
				};
				wake_pmx_func_sleep: wake_pmx_func_sleep {
					pinctrl-single,pins = <
						PRI_TDI AF1  /*GPIO117 WAKEUP_OUT*/
					
						PRI_TMS AF1  /*GPIO118 WAKEUP_IN*/
						GPIO41  AF0  
						PRI_TDO AF1  /*GPIO120*/
						
					>;
					DS_MEDIUM;PULL_NONE;EDGE_BOTH;SL_NORMAL;
				};
				usb_id_pinmux: usb_id_pinmux {
					pinctrl-single,pins = <
						USB_ID AF1/* usbid-gpio99 */
					>;
					DS_MEDIUM;PULL_UP;EDGE_NONE;LPM_NONE;
				};
				usb_id_pinmux_slp: usb_id_pinmux_slp {
					pinctrl-single,pins = <
						USB_ID AF1 /* usbid-gpio99 */
					>;
					DS_MEDIUM;PULL_UP;EDGE_BOTH;LPM_NONE;
				};
				usb_host_pinmux: usb_host_pinmux {
					pinctrl-single,pins = <
						VBUS_DRV AF1 /* gpio-122 */
					>;
					DS_MEDIUM;PULL_FLOAT;EDGE_NONE;LPM_NONE;
				};
				i2s_func: i2s_func {
					pinctrl-single,pins = <
						GPIO25 AF2
						GPIO26 AF2
						GPIO27 AF2
						GPIO28 AF2
					>;
					MFP_DEFAULT;
				};
				i2s_gpio: i2s_gpio {
					pinctrl-single,pins = <
						GPIO25 AF0
						GPIO26 AF0
						GPIO27 AF0
						GPIO28 AF0
					>;
					MFP_LPM_FLOAT;
				};
				sensors_int:sensors_int {
					pinctrl-single,pins = <
						GPIO22 AF0
					>;
					MFP_PULL_DOWN;
				};
				sensors_csb:sensors_csb {
					pinctrl-single,pins = <
						VCXO_OUT AF1
					>;
					DS_MEDIUM;PULL_UP;EDGE_NONE;
				};
			};

			ssp0: spi@d401b000 {
				status = "okay";
				pinctrl-names = "default";
				pinctrl-0 = <&ssp0_pmx_func>;
				asr,spi-inc-mode;
#ifdef CONFIG_FB_SPI_LCD
				/* this enhancemnet feature is not suitable for
				   3 line 9bits spi lcd. */
				/* asr,ssp-enhancement; */

				lcd: spidev@0 {
					#address-cells = <1>;
					#size-cells = <1>;
					compatible = "spilcd";
				//	pinctrl-names = "default";
				//	pinctrl-0 = <&lcd_bl_func>;
					reg = <0>;
					/* ST7735:  need to set spi-max-frequency to 26M
					 * ST7789V: can set spi-max-frequency to 52M
					 */
					spi-max-frequency = <26000000>;
					xres = <128>;
					yres = <128>;
					bits = <8>;	/* 8: 4line, 9: 3line */
					rst_gpio = <&gpio 24 0>;
				//	bl_gpio = <&gpio 126 0>;
					rs_gpio = <&gpio 22 0>;
					/* if comment the following statement, it means
					 * the avdd is sit on the "always-on" ldo.
					*/
					/* avdd-supply = <&LDO1>; */
				};
#else
				/*cs-gpios = <&gpio 34 0>;*//* DXS101 Use the config of Cs-gpios */
				slic: spidev@0{
					#address-cells = <1>;
					#size-cells = <1>;
					compatible = "asr,slic";
					reg = <0>;
					spi-cpol;
					spi-cpha;
					spi-max-frequency = <6500000>;
				};
#endif
			};
		   ssp2: spi@d401c000{
				status = "disabled";
				pinctrl-names = "default";
				pinctrl-0 = <&ssp2_pmx_func>;
				asr,spi-inc-mode;
				cs-gpios = <&gpio 39 0>;
				mbtk: spidev@0{
					compatible = "asr,spidev";
					reg = <0>;
					status = "okay";
					spi-cpol;
					spi-cpha;
					spi-max-frequency = <6500000>;
				};
			};
			twsi0: i2c@d4011000 {
				status= "okay";
				alc5616@1b {
					status= "disabled";
					compatible = "asrmicro,alc5616";
					reg = <0x1b>;
					pinctrl-names = "default", "sleep";
					pinctrl-0 = <&alc5616_pmx_func1>;
					pinctrl-1 = <&alc5616_pmx_func2>;
					clocks = <&soc_clocks ASR1803_CLK_I2S_SYSCLK>;
					clock-names = "i2s_sys_clk";
#if 0
					3V3-gpio = <&gpio 23 0>;/* CODEC_LDO_EN */
					irq-gpio = <&gpio 24 0>;/* CODEC_IRQ for headset detection */
#else
					irq-gpio = <&gpio 8 0>;/* CODEC_IRQ for headset detection */
#endif
				};

			nau8810@1a {
					compatible = "marvell,nau8810";
					clocks = <&soc_clocks ASR1803_CLK_I2S_SYSCLK>;
					clock-names = "i2s_sys_clk";

					
					pinctrl-names = "default";
					pinctrl-0 = <&es8311_pa_func1>;
					pinctrl-1 = <&es8311_pa_func2>;
					reg = <0x1a>;
					status= "disabled";
				};

			es8311@18 {
					compatible = "ambarella,es8311";
					reg = <0x18>;
					clocks = <&soc_clocks ASR1803_CLK_I2S_SYSCLK>;
					clock-names = "i2s_sys_clk";
				
					pinctrl-names = "default";
					pinctrl-0 = <&es8311_pa_func1>;
					pinctrl-1 = <&es8311_pa_func2>;
					gpios = <&gpio 54 0>;

				//	gpios = <&gpio 21 0>,
				//			<&gpio 23 0>,
				//			<&gpio 24 0>,
				//			<&gpio 22 0>;

					status= "okay";
				};

			asm330lhhx-imu@0x6a {
			        compatible = "st,asm330lhhx";
			        reg = <0x6b>;
					pinctrl-names = "default";
					pinctrl-0 = <&sensors_int &sensors_csb>;
			        interrupt-parent = <&gpio>;
			        interrupts = <22 1>;
			        //interrupts = <22>;
			        vddio-supply = <&sensors_vddio>;
			        //vdd-supply = <&sensors_vdd>;
			        st,int-pin = <1>;
			        //st,mlc-int-pin = <2>;
			        mount-matrix = "1", "0", "0",
			                       "0", "1", "0",
			                       "0", "0", "1";
				};
                                /* AWINIC AW87XXX Smart K PA */
                                aw87xxx_pa@58 {
                                        compatible = "awinic,aw87xxx_pa";
                                        reg = <0x58>;
                                        reset-gpio = <&gpio 24 0>;
                                        dev_index = < 0 >;
                                        status = "okay";
                                };
                                /* AWINIC AW87XXX Smart K PA End */
				/*
				pmic4: 88pm805@38 {
					compatible = "marvell,88pm805";
					reg = <0x38>;
				};
				*/
			};
			twsi1: i2c@d4010800 {
#if 1
				pinctrl-names = "default","gpio";
				pinctrl-0 = <&twsi1_pmx_func>;
				pinctrl-1 = <&twsi1_pmx_gpio>;
				i2c-gpio = <&gpio 10 0 &gpio 11 0>;
#endif
				status= "okay";
				//nau8810@1a {
				//	compatible = "marvell,nau8810";
				//	reg = <0x1a>;
				//};
        

			};
			twsi2: i2c@d4037000 {
				status = "okay";

				pmic4: 88pm805@38 {
					compatible = "marvell,88pm805";
					reg = <0x38>;
				};

				pmic5: pm802@0 {
					compatible = "asr,pm802";
					reg = <0x00>;
					interrupts = <4>;
					interrupt-parent = <&intc>;
					interrupt-controller;
					#interrupt-cells = <1>;
					chg_irq_from_exton;
					scs-int-active-high;
					battery {
						compatible = "asr,pm802-bat";
						status = "disabled";

						online-gpadc = <1>;
						temperature-gpadc = <1>;

						hi-volt-online = <1150>;	/* mV */
						lo-volt-online = <20>; /* mV */
						hi-volt-temp = <1150>; /* mV */
						lo-volt-temp = <200>; /* mV */

						sw-fg-use-ntc;
						full-capacity = <2050>; /* mAh */
						r1-resistor = <40>; /* mohm */
						r2-resistor = <30>; /* mohm */
						rs-resistor = <120>; /* mohm */
						roff-resistor = <0>; /* mohm */
						roff-initial-resistor = <0>; /* mohm */

						times-in-zero-degree = <1>;
						offset-in-zero-degree = <0>;

						times-in-ten-degree = <2>;
						offset-in-ten-degree = <100>;

						power-off-threshold = <3350>; /* mV */
						safe-power-off-threshold = <3200>; /* mV */

						online-gp-bias-curr = <11>; /* uA */

						soc-ramp-up-interval = <150>; /* s */
						/* choose -20C, 0C, 10C, 40C, 45C, 55C as threshold */
						tbat-threshold = <20 0 10 40 45 55>; /* ohm */
						ntc-table-size = <88>;
						stop-chg-for-vbatmeas;
						/* -24C, -23C, ..., 62C, 63C */
						ntc-table = <
							89680 85130 80840 76790 72970 69360 65960 62740
							59700 56830 54130 51530 49100 46800 44610 42550
							40590 38730 36970 35300 33710 32210 30780 29420
							28130 26910 25750 24640 23590 22580 21630 20720
							19860 19030 18250 17500 16790 16110 15460 14840
							14250 13690 13150 12640 12150 11680 11230 10800
							10390 10000 9620  9270  8920  8590  8280  7980
							7690  7410  7150  6890  6650  6410  6190  5970
							5770  5570  5380  5190  5020  4850  4680  4530
							4380  4230  4100  3960  3830  3710  3590  3480
							3370  3260  3160  3060  2960  2870  2780  2700
						>;
					};
					usb {
						status = "disabled";
						vbus_gpio = <0xff>; /* set_vbus */
						id-gpadc = <0xff>; /* usb-id */
						vchg-from-exton = <1>;
						vbus-detect = <1>; /* vbus-irq */
						get-vbus = <1>; /* get-vbus */
					};
				};
				pmic6: pm803@30 {
					compatible = "asr,pm803";
					reg = <0x30>;
					interrupts = <4>;
					interrupt-parent = <&intc>;
					interrupt-controller;
					#interrupt-cells = <1>;
					chg_irq_from_exton;
					scs-int-active-high;
					battery {
						compatible = "asr,pm803-bat";
						status = "disabled";

						online-gpadc = <1>;
						temperature-gpadc = <1>;

						hi-volt-online = <1150>;	/* mV */
						lo-volt-online = <20>; /* mV */
						hi-volt-temp = <1150>; /* mV */
						lo-volt-temp = <200>; /* mV */

						sw-fg-use-ntc;
						full-capacity = <2050>; /* mAh */
						r1-resistor = <40>; /* mohm */
						r2-resistor = <30>; /* mohm */
						rs-resistor = <120>; /* mohm */
						roff-resistor = <0>; /* mohm */
						roff-initial-resistor = <0>; /* mohm */

						times-in-zero-degree = <1>;
						offset-in-zero-degree = <0>;

						times-in-ten-degree = <2>;
						offset-in-ten-degree = <100>;

						power-off-threshold = <3350>; /* mV */
						safe-power-off-threshold = <3200>; /* mV */

						online-gp-bias-curr = <11>; /* uA */

						soc-ramp-up-interval = <150>; /* s */
						/* choose -20C, 0C, 10C, 40C, 45C, 55C as threshold */
						tbat-threshold = <20 0 10 40 45 55>; /* ohm */
						ntc-table-size = <88>;
						stop-chg-for-vbatmeas;
						/* -24C, -23C, ..., 62C, 63C */
						ntc-table = <
							89680 85130 80840 76790 72970 69360 65960 62740
							59700 56830 54130 51530 49100 46800 44610 42550
							40590 38730 36970 35300 33710 32210 30780 29420
							28130 26910 25750 24640 23590 22580 21630 20720
							19860 19030 18250 17500 16790 16110 15460 14840
							14250 13690 13150 12640 12150 11680 11230 10800
							10390 10000 9620  9270  8920  8590  8280  7980
							7690  7410  7150  6890  6650  6410  6190  5970
							5770  5570  5380  5190  5020  4850  4680  4530
							4380  4230  4100  3960  3830  3710  3590  3480
							3370  3260  3160  3060  2960  2870  2780  2700
						>;
					};
					usb {
						status = "disabled";
						vbus_gpio = <0xff>; /* set_vbus */
						id-gpadc = <0xff>; /* usb-id */
						vchg-from-exton = <1>;
						vbus-detect = <1>; /* vbus-irq */
						get-vbus = <1>; /* get-vbus */
					};
				};
			};
		};
	};

	vcc_sdh1: sd-regulator {
		compatible = "regulator-fixed";
		/*pinctrl-names = "default";*/
		/*pinctrl-0 = <&sd_ldo_en>;*/
		regulator-name = "SDH1 VCC";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
	/*	gpio = <&gpio 45 0>;*/
		enable-active-high;
		status = "okay";
	};

	sensors_vddio: imu-regulator {
		compatible = "regulator-fixed";
		/*pinctrl-names = "default";*/
		/*pinctrl-0 = <&sd_ldo_en>;*/
		regulator-name = "IMU VDDIO";
		gpio = <&gpio 21 0>;
		enable-active-high;
		status = "okay";
	};
	
	asr-rfkill {
		compatible = "asr,asr-rfkill";
		pinctrl-names = "off", "on";
		pinctrl-0 = <&sdh1_pmx_pd_rst_off>;
		pinctrl-1 = <&sdh1_pmx_pd_rst_on>;
		sd-host = <&sdh0>;
		//pd-gpio = <&gpio 90 0>;
		rst-gpio = <&gpio 90 0>;

		/*3v3-ldo-gpio = <&gpio 8 0>;*/
		/*edge-wakeup-gpio = <&gpio 10 0>;*/
		status = "okay";
	};
	
	mbtk-sdh{
		compatible = "mbtk,mbtk-sdh";
		pinctrl-names = "off", "on";
		pinctrl-0 = <&mbtk_sdh_pmx_off>;
		pinctrl-1 = <&mbtk_sdh_pmx_on>;
	    sd-host = <&sdh1>;
		1v8-ldo-gpio = <&gpio 123 0>;
		//host-wakeup-wlan-gpio = <&gpio 127 0>;
		wlan_en_gpio = <&gpio 125 0>;
		status = "okay";
	};
	
	asr-gps {
		compatible = "asr,asr-gnss";
		pinctrl-names = "default";
		pinctrl-0 = <&gnss_clk_on>;
		enable_vctcxo_out1;
		host-wakeup-gnss-gpio = <&gpio 47 0>;
		/*gnss-wakeup-host-gpio = <&gpio 47 0>;*/
		rst-gpio = <&gpio 45 0>;
		status = "okay";
	};

	pcie-rfkill {
		compatible = "mrvl,pcie-rfkill";
		pinctrl-names = "off", "on";
		pinctrl-0 = <&pcie_pmx_pd_rst_off>;
		pinctrl-1 = <&pcie_pmx_pd_rst_on>;
		rst-gpio = <&gpio 42 0>;
		3v3-ldo-gpio = <&gpio 24 0>;
		status = "disabled";
	};

	sound {
		compatible = "ASRMICRO,asrmicro-snd-card";
		ssp-controllers = <&ssp_dai1>;
	};

	asr-adc {
		compatible = "asr,adc";
		//pinctrl-names = "default";
		//pinctrl-0 = <&pin_func_work>;
		status = "okay"; 
	};

#if 0
	
	mbtk_PlatIrq{
			compatible = "mbtk,plat-irq";
			pinctrl-names = "sc_irq0", "sc_irq1", "sc_irq2", "sc_irq3";

			pinctrl-0 = <&sc_ext_int0>;
			pinctrl-1 = <&sc_ext_int1>;
			pinctrl-2 = <&sc_ext_int2>;
			pinctrl-3 = <&sc_ext_int3>;
			status = "disabled";
	};

#else

		mbtk_PlatIrq{
			compatible = "mbtk,plat-irq";
			pinctrl-names = "default", "sleep";
			pinctrl-0 = <&mbtk_plat_irq_func>;
			pinctrl-1 = <&mbtk_plat_irq_func_sleep>;
			//gpio_irq0 = <&gpio 21 0>;
			//gpio_irq1 = <&gpio 22 0>;
			gpio_irq2 = <&gpio 23 0>;
			gpio_irq3 = <&gpio 24 0>;
			status = "disabled";
	};

#endif

	ecall {
		compatible = "asr,ecall-event";
		pinctrl-names = "default";
		pinctrl-0 = <&ecall_pmx_func>;
		gpio-auto-ecall = <8>;
		gpio-manual-ecall = <9>;
		status = "disabled";
	};

	usim1: usim1 {
		compatible = "asr,usim1";
		pinctrl-names = "default", "sleep";
		pinctrl-0 = <&usim1_pmx_func>;
		pinctrl-1 = <&usim1_pmx_func_sleep>;
		edge_detect_gpio = <119>; /* GPIO19: SIM detect pin */
		status = "okay";
	};
	/* set okay for this node if usim2 is needed */
	usim2: usim2 {
		compatible = "asr,usim2";
		pinctrl-names = "default", "sleep";
		pinctrl-0 = <&usim2_pmx_func>;
		pinctrl-1 = <&usim2_pmx_func_sleep>;
		edge_detect_gpio = <44>; /* GPIO44: SIM detect pin */
#ifdef CONFIG_ASR_DSDS
		status = "okay";
#else
		status = "disabled";
#endif
	};
	gpio_keys {
		compatible = "gpio-keys";
		#address-cells = <1>;
		#size-cells = <0>;
		/* autorepeat; */
		pinctrl-names = "default";
		pinctrl-0 = <&gpiokey_pmx_func &gpiokey_ssp2_func>;
		button@1 {
			label = "qrcode-key";
			linux,code = <139>; /* KEY_MENU, refer to linux/input.h */
			/* NOTE:
			 * We use the FORCE DOWNLOAD key to implement the qrcode key in DKB.
			 * Customer SHOULD change it to any other gpios.
			 * Because user may do the misoperation that
			 * powerup with FDL key pressed,
			 * then the borad will enter force download mode.
			*/
			gpios = <&gpio 9 1>;
			gpio-key,wakeup;
		};
	};

	audio_pa {
		compatible = "asrmicro,audio-pa";
		pinctrl-names = "default";
		pinctrl-0 = <&audio_pa_pmx_func>;
		pa-gpio = <&gpio 14 0>;
		status = "disabled";
	};
	mbtk_GpioWakeUp {
		compatible = "mbtk,GpioWakeUp";
		pinctrl-names = "default", "sleep";
		pinctrl-0 = <&wake_pmx_func &wake_pmx_func1>;
		pinctrl-1 = <&wake_pmx_func_sleep>;
		wakeup-in-gpio = <&gpio 118 0>;
		wakeup-out-gpio = <&gpio 117 0>;
		status = "okay";
    };

    
    dtsleds{
    	compatible = "gpio-leds";
    	pinctrl-names = "default";
		pinctrl-0 = <&led_pmx_func1>;
    	status = "okay";
    	led0{
        	label = "red";      
        	gpios = <&gpio 8 0>;
        	linux,default-trigger = "pattern";    
        	led-pattern = "100:100:100"; 
        	default-state = "on";   

		};
		
    //	led1{
    //    	label = "blue";      
    //    	gpios = <&gpio 99 0>;       
    //   	linux,default-trigger = "timer";
    //     	timer-delay-on = <100>;
    //     	timer-delay-off = <100>;
    //     	brightness-levels = <100>;
    //    	brightness-max = <100>;
    // 	default-state = "on";
    //	};
    
    };

	audio_regs {
		compatible = "ASRMICRO,audio-registers";
		reg = <0xD4050044 0x4>;
		status = "okay";
	};

	nz3-slic {
		compatible = "asr,nz3-slic";
		pinctrl-names = "default", "sleep";
		pinctrl-0 = <&slic_pmx_func1 &slic_pmx_func2>;
		pinctrl-1 = <&slic_pmx_func1_sleep &slic_pmx_func2>;
		rst-gpio = <&gpio 21 0>;
		edge-wakeup-gpio = <&gpio 20 0>;
		vdd-3v3-gpio = <&gpio 127 0>;
		status = "disabled";
	};
	microsemi-slic {
		compatible = "asr,microsemi-slic";
		pinctrl-names = "default", "sleep";
		pinctrl-0 = <&slic_pmx_func1>;
		pinctrl-1 = <&slic_pmx_func1_sleep>;
		edge-wakeup-gpio = <&gpio 20 0>;
		vdd-3v3-gpio = <&gpio 127 0>;
		status = "disabled";
	};
	maxlinear-slic {
		compatible = "asr,maxlinear-slic";
		pinctrl-names = "default", "sleep";
		pinctrl-0 = <&slic_pmx_func1 &slic_pmx_func2>;
		pinctrl-1 = <&slic_pmx_func1_sleep &slic_pmx_func2>;
		rst-gpio = <&gpio 21 0>;
		edge-wakeup-gpio = <&gpio 20 0>;
		vdd-3v3-gpio = <&gpio 127 0>;
		status = "disabled";
	};
	/* deprecated, move to mfpr@d401e000
	lpm-board-cfg {
		compatible = "asr,lpm-board-cfg";
		wakeup-state-d1pp = <0x1>;
		udr-mfpr-config = <0x1B0 0xA040 0x0
							0x1B4 0xA040 0x0>;
	};
	*/
};
#ifdef CONFIG_ASR_DSDS
#include "asr_pm802_2usim.dtsi"
#include "88pm805.dtsi"
#include "asr_pm803_2usim.dtsi"
#else
#include "asr_pm802.dtsi"
#include "88pm805.dtsi"
#include "asr_pm803.dtsi"
#endif

#ifdef CONFIG_AB_SYSTEM
#include "asr1806_ab_flash_layout.dtsi"
#else
#include "asr1806_flash_layout.dtsi"
#endif