b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame] | 1 | From e01c91a360793298c9e1656a61faceff01487a43 Mon Sep 17 00:00:00 2001 |
| 2 | From: Ben Hutchings <ben@decadent.org.uk> |
| 3 | Date: Sat, 23 May 2020 23:50:34 +0800 |
| 4 | Subject: [PATCH] MIPS: Fix exception handler memcpy() |
| 5 | |
| 6 | The exception handler subroutines are declared as a single char, but |
| 7 | when copied to the required addresses the copy length is 0x80. |
| 8 | |
| 9 | When range checks are enabled for memcpy() this results in a build |
| 10 | failure, with error messages such as: |
| 11 | |
| 12 | In file included from arch/mips/mti-malta/malta-init.c:15: |
| 13 | In function 'memcpy', |
| 14 | inlined from 'mips_nmi_setup' at arch/mips/mti-malta/malta-init.c:98:2: |
| 15 | include/linux/string.h:376:4: error: call to '__read_overflow2' declared with attribute error: detected read beyond size of object passed as 2nd parameter |
| 16 | 376 | __read_overflow2(); |
| 17 | | ^~~~~~~~~~~~~~~~~~ |
| 18 | |
| 19 | Change the declarations to use type char[]. |
| 20 | |
| 21 | Signed-off-by: Ben Hutchings <ben@decadent.org.uk> |
| 22 | Signed-off-by: YunQiang Su <syq@debian.org> |
| 23 | Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> |
| 24 | --- |
| 25 | arch/mips/loongson64/common/init.c | 4 ++-- |
| 26 | arch/mips/mti-malta/malta-init.c | 8 ++++---- |
| 27 | arch/mips/pistachio/init.c | 8 ++++---- |
| 28 | 3 files changed, 10 insertions(+), 10 deletions(-) |
| 29 | |
| 30 | --- a/arch/mips/loongson64/common/init.c |
| 31 | +++ b/arch/mips/loongson64/common/init.c |
| 32 | @@ -18,10 +18,10 @@ unsigned long __maybe_unused _loongson_a |
| 33 | static void __init mips_nmi_setup(void) |
| 34 | { |
| 35 | void *base; |
| 36 | - extern char except_vec_nmi; |
| 37 | + extern char except_vec_nmi[]; |
| 38 | |
| 39 | base = (void *)(CAC_BASE + 0x380); |
| 40 | - memcpy(base, &except_vec_nmi, 0x80); |
| 41 | + memcpy(base, except_vec_nmi, 0x80); |
| 42 | flush_icache_range((unsigned long)base, (unsigned long)base + 0x80); |
| 43 | } |
| 44 | |
| 45 | --- a/arch/mips/mti-malta/malta-init.c |
| 46 | +++ b/arch/mips/mti-malta/malta-init.c |
| 47 | @@ -90,24 +90,24 @@ static void __init console_config(void) |
| 48 | static void __init mips_nmi_setup(void) |
| 49 | { |
| 50 | void *base; |
| 51 | - extern char except_vec_nmi; |
| 52 | + extern char except_vec_nmi[]; |
| 53 | |
| 54 | base = cpu_has_veic ? |
| 55 | (void *)(CAC_BASE + 0xa80) : |
| 56 | (void *)(CAC_BASE + 0x380); |
| 57 | - memcpy(base, &except_vec_nmi, 0x80); |
| 58 | + memcpy(base, except_vec_nmi, 0x80); |
| 59 | flush_icache_range((unsigned long)base, (unsigned long)base + 0x80); |
| 60 | } |
| 61 | |
| 62 | static void __init mips_ejtag_setup(void) |
| 63 | { |
| 64 | void *base; |
| 65 | - extern char except_vec_ejtag_debug; |
| 66 | + extern char except_vec_ejtag_debug[]; |
| 67 | |
| 68 | base = cpu_has_veic ? |
| 69 | (void *)(CAC_BASE + 0xa00) : |
| 70 | (void *)(CAC_BASE + 0x300); |
| 71 | - memcpy(base, &except_vec_ejtag_debug, 0x80); |
| 72 | + memcpy(base, except_vec_ejtag_debug, 0x80); |
| 73 | flush_icache_range((unsigned long)base, (unsigned long)base + 0x80); |
| 74 | } |
| 75 | |
| 76 | --- a/arch/mips/pistachio/init.c |
| 77 | +++ b/arch/mips/pistachio/init.c |
| 78 | @@ -83,12 +83,12 @@ phys_addr_t mips_cdmm_phys_base(void) |
| 79 | static void __init mips_nmi_setup(void) |
| 80 | { |
| 81 | void *base; |
| 82 | - extern char except_vec_nmi; |
| 83 | + extern char except_vec_nmi[]; |
| 84 | |
| 85 | base = cpu_has_veic ? |
| 86 | (void *)(CAC_BASE + 0xa80) : |
| 87 | (void *)(CAC_BASE + 0x380); |
| 88 | - memcpy(base, &except_vec_nmi, 0x80); |
| 89 | + memcpy(base, except_vec_nmi, 0x80); |
| 90 | flush_icache_range((unsigned long)base, |
| 91 | (unsigned long)base + 0x80); |
| 92 | } |
| 93 | @@ -96,12 +96,12 @@ static void __init mips_nmi_setup(void) |
| 94 | static void __init mips_ejtag_setup(void) |
| 95 | { |
| 96 | void *base; |
| 97 | - extern char except_vec_ejtag_debug; |
| 98 | + extern char except_vec_ejtag_debug[]; |
| 99 | |
| 100 | base = cpu_has_veic ? |
| 101 | (void *)(CAC_BASE + 0xa00) : |
| 102 | (void *)(CAC_BASE + 0x300); |
| 103 | - memcpy(base, &except_vec_ejtag_debug, 0x80); |
| 104 | + memcpy(base, except_vec_ejtag_debug, 0x80); |
| 105 | flush_icache_range((unsigned long)base, |
| 106 | (unsigned long)base + 0x80); |
| 107 | } |