blob: 683178727c3f555a9da2e7108dbed79de12b9f8b [file] [log] [blame]
b.liue9582032025-04-17 19:18:16 +08001From 5c74c54ce6fff719999ff48f128cf4150ee4ff59 Mon Sep 17 00:00:00 2001
2From: Iwan R Timmer <irtimmer@gmail.com>
3Date: Thu, 7 Nov 2019 22:11:13 +0100
4Subject: [PATCH] net: dsa: mv88e6xxx: Split monitor port configuration
5
6Separate the configuration of the egress and ingress monitor port.
7This allows the port mirror functionality to do ingress and egress
8port mirroring to separate ports.
9
10Signed-off-by: Iwan R Timmer <irtimmer@gmail.com>
11Reviewed-by: Andrew Lunn <andrew@lunn.ch>
12Signed-off-by: David S. Miller <davem@davemloft.net>
13---
14 drivers/net/dsa/mv88e6xxx/chip.c | 9 ++++++-
15 drivers/net/dsa/mv88e6xxx/chip.h | 9 ++++++-
16 drivers/net/dsa/mv88e6xxx/global1.c | 42 ++++++++++++++++++++---------
17 drivers/net/dsa/mv88e6xxx/global1.h | 8 ++++--
18 4 files changed, 52 insertions(+), 16 deletions(-)
19
20--- a/drivers/net/dsa/mv88e6xxx/chip.c
21+++ b/drivers/net/dsa/mv88e6xxx/chip.c
22@@ -2384,7 +2384,14 @@ static int mv88e6xxx_setup_upstream_port
23
24 if (chip->info->ops->set_egress_port) {
25 err = chip->info->ops->set_egress_port(chip,
26- upstream_port);
27+ MV88E6XXX_EGRESS_DIR_INGRESS,
28+ upstream_port);
29+ if (err)
30+ return err;
31+
32+ err = chip->info->ops->set_egress_port(chip,
33+ MV88E6XXX_EGRESS_DIR_EGRESS,
34+ upstream_port);
35 if (err)
36 return err;
37 }
38--- a/drivers/net/dsa/mv88e6xxx/chip.h
39+++ b/drivers/net/dsa/mv88e6xxx/chip.h
40@@ -33,6 +33,11 @@ enum mv88e6xxx_egress_mode {
41 MV88E6XXX_EGRESS_MODE_ETHERTYPE,
42 };
43
44+enum mv88e6xxx_egress_direction {
45+ MV88E6XXX_EGRESS_DIR_INGRESS,
46+ MV88E6XXX_EGRESS_DIR_EGRESS,
47+};
48+
49 enum mv88e6xxx_frame_mode {
50 MV88E6XXX_FRAME_MODE_NORMAL,
51 MV88E6XXX_FRAME_MODE_DSA,
52@@ -464,7 +469,9 @@ struct mv88e6xxx_ops {
53 int (*stats_get_stats)(struct mv88e6xxx_chip *chip, int port,
54 uint64_t *data);
55 int (*set_cpu_port)(struct mv88e6xxx_chip *chip, int port);
56- int (*set_egress_port)(struct mv88e6xxx_chip *chip, int port);
57+ int (*set_egress_port)(struct mv88e6xxx_chip *chip,
58+ enum mv88e6xxx_egress_direction direction,
59+ int port);
60
61 #define MV88E6XXX_CASCADE_PORT_NONE 0xe
62 #define MV88E6XXX_CASCADE_PORT_MULTIPLE 0xf
63--- a/drivers/net/dsa/mv88e6xxx/global1.c
64+++ b/drivers/net/dsa/mv88e6xxx/global1.c
65@@ -294,7 +294,9 @@ int mv88e6250_g1_ieee_pri_map(struct mv8
66 /* Offset 0x1a: Monitor Control */
67 /* Offset 0x1a: Monitor & MGMT Control on some devices */
68
69-int mv88e6095_g1_set_egress_port(struct mv88e6xxx_chip *chip, int port)
70+int mv88e6095_g1_set_egress_port(struct mv88e6xxx_chip *chip,
71+ enum mv88e6xxx_egress_direction direction,
72+ int port)
73 {
74 u16 reg;
75 int err;
76@@ -303,11 +305,20 @@ int mv88e6095_g1_set_egress_port(struct
77 if (err)
78 return err;
79
80- reg &= ~(MV88E6185_G1_MONITOR_CTL_INGRESS_DEST_MASK |
81- MV88E6185_G1_MONITOR_CTL_EGRESS_DEST_MASK);
82-
83- reg |= port << __bf_shf(MV88E6185_G1_MONITOR_CTL_INGRESS_DEST_MASK) |
84- port << __bf_shf(MV88E6185_G1_MONITOR_CTL_EGRESS_DEST_MASK);
85+ switch (direction) {
86+ case MV88E6XXX_EGRESS_DIR_INGRESS:
87+ reg &= MV88E6185_G1_MONITOR_CTL_INGRESS_DEST_MASK;
88+ reg |= port <<
89+ __bf_shf(MV88E6185_G1_MONITOR_CTL_INGRESS_DEST_MASK);
90+ break;
91+ case MV88E6XXX_EGRESS_DIR_EGRESS:
92+ reg &= MV88E6185_G1_MONITOR_CTL_EGRESS_DEST_MASK;
93+ reg |= port <<
94+ __bf_shf(MV88E6185_G1_MONITOR_CTL_EGRESS_DEST_MASK);
95+ break;
96+ default:
97+ return -EINVAL;
98+ }
99
100 return mv88e6xxx_g1_write(chip, MV88E6185_G1_MONITOR_CTL, reg);
101 }
102@@ -341,17 +352,24 @@ static int mv88e6390_g1_monitor_write(st
103 return mv88e6xxx_g1_write(chip, MV88E6390_G1_MONITOR_MGMT_CTL, reg);
104 }
105
106-int mv88e6390_g1_set_egress_port(struct mv88e6xxx_chip *chip, int port)
107+int mv88e6390_g1_set_egress_port(struct mv88e6xxx_chip *chip,
108+ enum mv88e6xxx_egress_direction direction,
109+ int port)
110 {
111 u16 ptr;
112 int err;
113
114- ptr = MV88E6390_G1_MONITOR_MGMT_CTL_PTR_INGRESS_DEST;
115- err = mv88e6390_g1_monitor_write(chip, ptr, port);
116- if (err)
117- return err;
118+ switch (direction) {
119+ case MV88E6XXX_EGRESS_DIR_INGRESS:
120+ ptr = MV88E6390_G1_MONITOR_MGMT_CTL_PTR_INGRESS_DEST;
121+ break;
122+ case MV88E6XXX_EGRESS_DIR_EGRESS:
123+ ptr = MV88E6390_G1_MONITOR_MGMT_CTL_PTR_EGRESS_DEST;
124+ break;
125+ default:
126+ return -EINVAL;
127+ }
128
129- ptr = MV88E6390_G1_MONITOR_MGMT_CTL_PTR_EGRESS_DEST;
130 err = mv88e6390_g1_monitor_write(chip, ptr, port);
131 if (err)
132 return err;
133--- a/drivers/net/dsa/mv88e6xxx/global1.h
134+++ b/drivers/net/dsa/mv88e6xxx/global1.h
135@@ -289,8 +289,12 @@ int mv88e6095_g1_stats_set_histogram(str
136 int mv88e6390_g1_stats_set_histogram(struct mv88e6xxx_chip *chip);
137 void mv88e6xxx_g1_stats_read(struct mv88e6xxx_chip *chip, int stat, u32 *val);
138 int mv88e6xxx_g1_stats_clear(struct mv88e6xxx_chip *chip);
139-int mv88e6095_g1_set_egress_port(struct mv88e6xxx_chip *chip, int port);
140-int mv88e6390_g1_set_egress_port(struct mv88e6xxx_chip *chip, int port);
141+int mv88e6095_g1_set_egress_port(struct mv88e6xxx_chip *chip,
142+ enum mv88e6xxx_egress_direction direction,
143+ int port);
144+int mv88e6390_g1_set_egress_port(struct mv88e6xxx_chip *chip,
145+ enum mv88e6xxx_egress_direction direction,
146+ int port);
147 int mv88e6095_g1_set_cpu_port(struct mv88e6xxx_chip *chip, int port);
148 int mv88e6390_g1_set_cpu_port(struct mv88e6xxx_chip *chip, int port);
149 int mv88e6390_g1_mgmt_rsvd2cpu(struct mv88e6xxx_chip *chip);