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192.168.1.100 / T108 / 5a25c2a7746e2bff09b0bd552a6d2cefc5a17a04 / . / marvell / linux / arch / arm / boot / dts / at91sam9rl.dtsi
blob: 0121bb0ecde1614ac1c34f96238a5c2c3186010a [file] [log] [blame]
b.liue9582032025-04-17 19:18:16 +0800[diff] [blame]1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * at91sam9rl.dtsi - Device Tree Include file for AT91SAM9RL family SoC
4 *
5 * Copyright (C) 2014 Microchip
6 * Alexandre Belloni <alexandre.belloni@free-electrons.com>
7 */
8
9#include <dt-bindings/pinctrl/at91.h>
10#include <dt-bindings/clock/at91.h>
11#include <dt-bindings/interrupt-controller/irq.h>
12#include <dt-bindings/gpio/gpio.h>
13#include <dt-bindings/pwm/pwm.h>
14
15/ {
16 #address-cells = <1>;
17 #size-cells = <1>;
18 model = "Atmel AT91SAM9RL family SoC";
19 compatible = "atmel,at91sam9rl", "atmel,at91sam9";
20 interrupt-parent = <&aic>;
21
22 aliases {
23 serial0 = &dbgu;
24 serial1 = &usart0;
25 serial2 = &usart1;
26 serial3 = &usart2;
27 serial4 = &usart3;
28 gpio0 = &pioA;
29 gpio1 = &pioB;
30 gpio2 = &pioC;
31 gpio3 = &pioD;
32 tcb0 = &tcb0;
33 i2c0 = &i2c0;
34 i2c1 = &i2c1;
35 ssc0 = &ssc0;
36 ssc1 = &ssc1;
37 pwm0 = &pwm0;
38 };
39
40 cpus {
41 #address-cells = <0>;
42 #size-cells = <0>;
43
44 cpu {
45 compatible = "arm,arm926ej-s";
46 device_type = "cpu";
47 };
48 };
49
50 memory {
51 device_type = "memory";
52 reg = <0x20000000 0x04000000>;
53 };
54
55 clocks {
56 slow_xtal: slow_xtal {
57 compatible = "fixed-clock";
58 #clock-cells = <0>;
59 clock-frequency = <0>;
60 };
61
62 main_xtal: main_xtal {
63 compatible = "fixed-clock";
64 #clock-cells = <0>;
65 clock-frequency = <0>;
66 };
67
68 adc_op_clk: adc_op_clk{
69 compatible = "fixed-clock";
70 #clock-cells = <0>;
71 clock-frequency = <1000000>;
72 };
73 };
74
75 sram: sram@300000 {
76 compatible = "mmio-sram";
77 reg = <0x00300000 0x10000>;
78 };
79
80 ahb {
81 compatible = "simple-bus";
82 #address-cells = <1>;
83 #size-cells = <1>;
84 ranges;
85
86 fb0: fb@500000 {
87 compatible = "atmel,at91sam9rl-lcdc";
88 reg = <0x00500000 0x1000>;
89 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 3>;
90 pinctrl-names = "default";
91 pinctrl-0 = <&pinctrl_fb>;
92 clocks = <&pmc PMC_TYPE_PERIPHERAL 23>, <&pmc PMC_TYPE_PERIPHERAL 23>;
93 clock-names = "hclk", "lcdc_clk";
94 status = "disabled";
95 };
96
97 ebi: ebi@10000000 {
98 compatible = "atmel,at91sam9rl-ebi";
99 #address-cells = <2>;
100 #size-cells = <1>;
101 atmel,smc = <&smc>;
102 atmel,matrix = <&matrix>;
103 reg = <0x10000000 0x80000000>;
104 ranges = <0x0 0x0 0x10000000 0x10000000
105 0x1 0x0 0x20000000 0x10000000
106 0x2 0x0 0x30000000 0x10000000
107 0x3 0x0 0x40000000 0x10000000
108 0x4 0x0 0x50000000 0x10000000
109 0x5 0x0 0x60000000 0x10000000>;
110 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
111 status = "disabled";
112
113 nand_controller: nand-controller {
114 compatible = "atmel,at91sam9g45-nand-controller";
115 #address-cells = <2>;
116 #size-cells = <1>;
117 ranges;
118 status = "disabled";
119 };
120 };
121
122 apb {
123 compatible = "simple-bus";
124 #address-cells = <1>;
125 #size-cells = <1>;
126 ranges;
127
128 tcb0: timer@fffa0000 {
129 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
130 #address-cells = <1>;
131 #size-cells = <0>;
132 reg = <0xfffa0000 0x100>;
133 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 0>,
134 <17 IRQ_TYPE_LEVEL_HIGH 0>,
135 <18 IRQ_TYPE_LEVEL_HIGH 0>;
136 clocks = <&pmc PMC_TYPE_PERIPHERAL 16>, <&pmc PMC_TYPE_PERIPHERAL 17>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&clk32k>;
137 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
138 };
139
140 mmc0: mmc@fffa4000 {
141 compatible = "atmel,hsmci";
142 reg = <0xfffa4000 0x600>;
143 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>;
144 #address-cells = <1>;
145 #size-cells = <0>;
146 pinctrl-names = "default";
147 clocks = <&pmc PMC_TYPE_PERIPHERAL 10>;
148 clock-names = "mci_clk";
149 status = "disabled";
150 };
151
152 i2c0: i2c@fffa8000 {
153 compatible = "atmel,at91sam9260-i2c";
154 reg = <0xfffa8000 0x100>;
155 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
156 #address-cells = <1>;
157 #size-cells = <0>;
158 clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
159 status = "disabled";
160 };
161
162 i2c1: i2c@fffac000 {
163 compatible = "atmel,at91sam9260-i2c";
164 reg = <0xfffac000 0x100>;
165 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>;
166 #address-cells = <1>;
167 #size-cells = <0>;
168 status = "disabled";
169 };
170
171 usart0: serial@fffb0000 {
172 compatible = "atmel,at91sam9260-usart";
173 reg = <0xfffb0000 0x200>;
174 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
175 atmel,use-dma-rx;
176 atmel,use-dma-tx;
177 pinctrl-names = "default";
178 pinctrl-0 = <&pinctrl_usart0>;
179 clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
180 clock-names = "usart";
181 status = "disabled";
182 };
183
184 usart1: serial@fffb4000 {
185 compatible = "atmel,at91sam9260-usart";
186 reg = <0xfffb4000 0x200>;
187 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
188 atmel,use-dma-rx;
189 atmel,use-dma-tx;
190 pinctrl-names = "default";
191 pinctrl-0 = <&pinctrl_usart1>;
192 clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
193 clock-names = "usart";
194 status = "disabled";
195 };
196
197 usart2: serial@fffb8000 {
198 compatible = "atmel,at91sam9260-usart";
199 reg = <0xfffb8000 0x200>;
200 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
201 atmel,use-dma-rx;
202 atmel,use-dma-tx;
203 pinctrl-names = "default";
204 pinctrl-0 = <&pinctrl_usart2>;
205 clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
206 clock-names = "usart";
207 status = "disabled";
208 };
209
210 usart3: serial@fffbc000 {
211 compatible = "atmel,at91sam9260-usart";
212 reg = <0xfffbc000 0x200>;
213 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
214 atmel,use-dma-rx;
215 atmel,use-dma-tx;
216 pinctrl-names = "default";
217 pinctrl-0 = <&pinctrl_usart3>;
218 clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
219 clock-names = "usart";
220 status = "disabled";
221 };
222
223 ssc0: ssc@fffc0000 {
224 compatible = "atmel,at91sam9rl-ssc";
225 reg = <0xfffc0000 0x4000>;
226 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
227 pinctrl-names = "default";
228 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
229 status = "disabled";
230 };
231
232 ssc1: ssc@fffc4000 {
233 compatible = "atmel,at91sam9rl-ssc";
234 reg = <0xfffc4000 0x4000>;
235 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
236 pinctrl-names = "default";
237 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
238 status = "disabled";
239 };
240
241 pwm0: pwm@fffc8000 {
242 compatible = "atmel,at91sam9rl-pwm";
243 reg = <0xfffc8000 0x300>;
244 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 4>;
245 #pwm-cells = <3>;
246 clocks = <&pmc PMC_TYPE_PERIPHERAL 19>;
247 clock-names = "pwm_clk";
248 status = "disabled";
249 };
250
251 spi0: spi@fffcc000 {
252 #address-cells = <1>;
253 #size-cells = <0>;
254 compatible = "atmel,at91rm9200-spi";
255 reg = <0xfffcc000 0x200>;
256 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
257 pinctrl-names = "default";
258 pinctrl-0 = <&pinctrl_spi0>;
259 clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
260 clock-names = "spi_clk";
261 status = "disabled";
262 };
263
264 adc0: adc@fffd0000 {
265 #address-cells = <1>;
266 #size-cells = <0>;
267 compatible = "atmel,at91sam9rl-adc";
268 reg = <0xfffd0000 0x100>;
269 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
270 clocks = <&pmc PMC_TYPE_PERIPHERAL 20>, <&adc_op_clk>;
271 clock-names = "adc_clk", "adc_op_clk";
272 atmel,adc-use-external-triggers;
273 atmel,adc-channels-used = <0x3f>;
274 atmel,adc-vref = <3300>;
275 atmel,adc-startup-time = <40>;
276 atmel,adc-res = <8 10>;
277 atmel,adc-res-names = "lowres", "highres";
278 atmel,adc-use-res = "highres";
279
280 trigger0 {
281 trigger-name = "external-rising";
282 trigger-value = <0x1>;
283 trigger-external;
284 };
285
286 trigger1 {
287 trigger-name = "external-falling";
288 trigger-value = <0x2>;
289 trigger-external;
290 };
291
292 trigger2 {
293 trigger-name = "external-any";
294 trigger-value = <0x3>;
295 trigger-external;
296 };
297
298 trigger3 {
299 trigger-name = "continuous";
300 trigger-value = <0x6>;
301 };
302 };
303
304 usb0: gadget@fffd4000 {
305 #address-cells = <1>;
306 #size-cells = <0>;
307 compatible = "atmel,at91sam9rl-udc";
308 reg = <0x00600000 0x100000>,
309 <0xfffd4000 0x4000>;
310 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
311 clocks = <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_CORE PMC_UTMI>;
312 clock-names = "pclk", "hclk";
313 status = "disabled";
314
315 ep@0 {
316 reg = <0>;
317 atmel,fifo-size = <64>;
318 atmel,nb-banks = <1>;
319 };
320
321 ep@1 {
322 reg = <1>;
323 atmel,fifo-size = <1024>;
324 atmel,nb-banks = <2>;
325 atmel,can-dma;
326 atmel,can-isoc;
327 };
328
329 ep@2 {
330 reg = <2>;
331 atmel,fifo-size = <1024>;
332 atmel,nb-banks = <2>;
333 atmel,can-dma;
334 atmel,can-isoc;
335 };
336
337 ep@3 {
338 reg = <3>;
339 atmel,fifo-size = <1024>;
340 atmel,nb-banks = <3>;
341 atmel,can-dma;
342 };
343
344 ep@4 {
345 reg = <4>;
346 atmel,fifo-size = <1024>;
347 atmel,nb-banks = <3>;
348 atmel,can-dma;
349 };
350
351 ep@5 {
352 reg = <5>;
353 atmel,fifo-size = <1024>;
354 atmel,nb-banks = <3>;
355 atmel,can-dma;
356 atmel,can-isoc;
357 };
358
359 ep@6 {
360 reg = <6>;
361 atmel,fifo-size = <1024>;
362 atmel,nb-banks = <3>;
363 atmel,can-dma;
364 atmel,can-isoc;
365 };
366 };
367
368 dma0: dma-controller@ffffe600 {
369 compatible = "atmel,at91sam9rl-dma";
370 reg = <0xffffe600 0x200>;
371 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
372 #dma-cells = <2>;
373 clocks = <&pmc PMC_TYPE_PERIPHERAL 21>;
374 clock-names = "dma_clk";
375 };
376
377 ramc0: ramc@ffffea00 {
378 compatible = "atmel,at91sam9260-sdramc";
379 reg = <0xffffea00 0x200>;
380 };
381
382 smc: smc@ffffec00 {
383 compatible = "atmel,at91sam9260-smc", "syscon";
384 reg = <0xffffec00 0x200>;
385 };
386
387 matrix: matrix@ffffee00 {
388 compatible = "atmel,at91sam9rl-matrix", "syscon";
389 reg = <0xffffee00 0x200>;
390 };
391
392 aic: interrupt-controller@fffff000 {
393 #interrupt-cells = <3>;
394 compatible = "atmel,at91rm9200-aic";
395 interrupt-controller;
396 reg = <0xfffff000 0x200>;
397 atmel,external-irqs = <31>;
398 };
399
400 dbgu: serial@fffff200 {
401 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
402 reg = <0xfffff200 0x200>;
403 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
404 pinctrl-names = "default";
405 pinctrl-0 = <&pinctrl_dbgu>;
406 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
407 clock-names = "usart";
408 status = "disabled";
409 };
410
411 pinctrl@fffff400 {
412 #address-cells = <1>;
413 #size-cells = <1>;
414 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
415 ranges = <0xfffff400 0xfffff400 0x800>;
416
417 atmel,mux-mask =
418 /* A B */
419 <0xffffffff 0xe05c6738>, /* pioA */
420 <0xffffffff 0x0000c780>, /* pioB */
421 <0xffffffff 0xe3ffff0e>, /* pioC */
422 <0x003fffff 0x0001ff3c>; /* pioD */
423
424 /* shared pinctrl settings */
425 adc0 {
426 pinctrl_adc0_ts: adc0_ts-0 {
427 atmel,pins =
428 <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE>,
429 <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE>,
430 <AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>,
431 <AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>;
432 };
433
434 pinctrl_adc0_ad0: adc0_ad0-0 {
435 atmel,pins = <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE>;
436 };
437
438 pinctrl_adc0_ad1: adc0_ad1-0 {
439 atmel,pins = <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE>;
440 };
441
442 pinctrl_adc0_ad2: adc0_ad2-0 {
443 atmel,pins = <AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>;
444 };
445
446 pinctrl_adc0_ad3: adc0_ad3-0 {
447 atmel,pins = <AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>;
448 };
449
450 pinctrl_adc0_ad4: adc0_ad4-0 {
451 atmel,pins = <AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_NONE>;
452 };
453
454 pinctrl_adc0_ad5: adc0_ad5-0 {
455 atmel,pins = <AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_NONE>;
456 };
457
458 pinctrl_adc0_adtrg: adc0_adtrg-0 {
459 atmel,pins = <AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
460 };
461 };
462
463 dbgu {
464 pinctrl_dbgu: dbgu-0 {
465 atmel,pins =
466 <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
467 <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
468 };
469 };
470
471 ebi {
472 pinctrl_ebi_addr_nand: ebi-addr-0 {
473 atmel,pins =
474 <AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>,
475 <AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>;
476 };
477 };
478
479 fb {
480 pinctrl_fb: fb-0 {
481 atmel,pins =
482 <AT91_PIOC 1 AT91_PERIPH_B AT91_PINCTRL_NONE>,
483 <AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE>,
484 <AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE>,
485 <AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE>,
486 <AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE>,
487 <AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>,
488 <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>,
489 <AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_NONE>,
490 <AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_NONE>,
491 <AT91_PIOC 13 AT91_PERIPH_B AT91_PINCTRL_NONE>,
492 <AT91_PIOC 15 AT91_PERIPH_B AT91_PINCTRL_NONE>,
493 <AT91_PIOC 16 AT91_PERIPH_B AT91_PINCTRL_NONE>,
494 <AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE>,
495 <AT91_PIOC 18 AT91_PERIPH_B AT91_PINCTRL_NONE>,
496 <AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE>,
497 <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE>,
498 <AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE>,
499 <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>,
500 <AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>,
501 <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>,
502 <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>;
503 };
504 };
505
506 i2c_gpio0 {
507 pinctrl_i2c_gpio0: i2c_gpio0-0 {
508 atmel,pins =
509 <AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>,
510 <AT91_PIOA 24 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
511 };
512 };
513
514 i2c_gpio1 {
515 pinctrl_i2c_gpio1: i2c_gpio1-0 {
516 atmel,pins =
517 <AT91_PIOD 10 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>,
518 <AT91_PIOD 11 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
519 };
520 };
521
522 mmc0 {
523 pinctrl_mmc0_clk: mmc0_clk-0 {
524 atmel,pins =
525 <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;
526 };
527
528 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
529 atmel,pins =
530 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
531 <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
532 };
533
534 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
535 atmel,pins =
536 <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
537 <AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
538 <AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
539 };
540 };
541
542 nand {
543 pinctrl_nand_rb: nand-rb-0 {
544 atmel,pins =
545 <AT91_PIOD 17 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
546 };
547
548 pinctrl_nand_cs: nand-cs-0 {
549 atmel,pins =
550 <AT91_PIOB 6 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
551 };
552
553 pinctrl_nand_oe_we: nand-oe-we-0 {
554 atmel,pins =
555 <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE>,
556 <AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>;
557 };
558 };
559
560 pwm0 {
561 pinctrl_pwm0_pwm0_0: pwm0_pwm0-0 {
562 atmel,pins = <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
563 };
564
565 pinctrl_pwm0_pwm0_1: pwm0_pwm0-1 {
566 atmel,pins = <AT91_PIOC 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
567 };
568
569 pinctrl_pwm0_pwm0_2: pwm0_pwm0-2 {
570 atmel,pins = <AT91_PIOD 14 AT91_PERIPH_B AT91_PINCTRL_NONE>;
571 };
572
573 pinctrl_pwm0_pwm1_0: pwm0_pwm1-0 {
574 atmel,pins = <AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
575 };
576
577 pinctrl_pwm0_pwm1_1: pwm0_pwm1-1 {
578 atmel,pins = <AT91_PIOC 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
579 };
580
581 pinctrl_pwm0_pwm1_2: pwm0_pwm1-2 {
582 atmel,pins = <AT91_PIOD 15 AT91_PERIPH_B AT91_PINCTRL_NONE>;
583 };
584
585 pinctrl_pwm0_pwm2_0: pwm0_pwm2-0 {
586 atmel,pins = <AT91_PIOD 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;
587 };
588
589 pinctrl_pwm0_pwm2_1: pwm0_pwm2-1 {
590 atmel,pins = <AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>;
591 };
592
593 pinctrl_pwm0_pwm2_2: pwm0_pwm2-2 {
594 atmel,pins = <AT91_PIOD 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
595 };
596
597 pinctrl_pwm0_pwm3_0: pwm0_pwm3-0 {
598 atmel,pins = <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
599 };
600
601 pinctrl_pwm0_pwm3_1: pwm0_pwm3-1 {
602 atmel,pins = <AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_NONE>;
603 };
604 };
605
606 spi0 {
607 pinctrl_spi0: spi0-0 {
608 atmel,pins =
609 <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>,
610 <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>,
611 <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
612 };
613 };
614
615 ssc0 {
616 pinctrl_ssc0_tx: ssc0_tx-0 {
617 atmel,pins =
618 <AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE>,
619 <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE>,
620 <AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE>;
621 };
622
623 pinctrl_ssc0_rx: ssc0_rx-0 {
624 atmel,pins =
625 <AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE>,
626 <AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE>,
627 <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
628 };
629 };
630
631 ssc1 {
632 pinctrl_ssc1_tx: ssc1_tx-0 {
633 atmel,pins =
634 <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>,
635 <AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>,
636 <AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>;
637 };
638
639 pinctrl_ssc1_rx: ssc1_rx-0 {
640 atmel,pins =
641 <AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_NONE>,
642 <AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE>,
643 <AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_NONE>;
644 };
645 };
646
647 tcb0 {
648 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
649 atmel,pins = <AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
650 };
651
652 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
653 atmel,pins = <AT91_PIOC 31 AT91_PERIPH_B AT91_PINCTRL_NONE>;
654 };
655
656 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
657 atmel,pins = <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
658 };
659
660 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
661 atmel,pins = <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_NONE>;
662 };
663
664 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
665 atmel,pins = <AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE>;
666 };
667
668 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
669 atmel,pins = <AT91_PIOD 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
670 };
671
672 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
673 atmel,pins = <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;
674 };
675
676 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
677 atmel,pins = <AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE>;
678 };
679
680 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
681 atmel,pins = <AT91_PIOD 11 AT91_PERIPH_B AT91_PINCTRL_NONE>;
682 };
683 };
684
685 usart0 {
686 pinctrl_usart0: usart0-0 {
687 atmel,pins =
688 <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
689 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
690 };
691
692 pinctrl_usart0_rts: usart0_rts-0 {
693 atmel,pins =
694 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE>;
695 };
696
697 pinctrl_usart0_cts: usart0_cts-0 {
698 atmel,pins =
699 <AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
700 };
701
702 pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 {
703 atmel,pins =
704 <AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE>,
705 <AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
706 };
707
708 pinctrl_usart0_dcd: usart0_dcd-0 {
709 atmel,pins =
710 <AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>;
711 };
712
713 pinctrl_usart0_ri: usart0_ri-0 {
714 atmel,pins =
715 <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE>;
716 };
717
718 pinctrl_usart0_sck: usart0_sck-0 {
719 atmel,pins =
720 <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>;
721 };
722 };
723
724 usart1 {
725 pinctrl_usart1: usart1-0 {
726 atmel,pins =
727 <AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
728 <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
729 };
730
731 pinctrl_usart1_rts: usart1_rts-0 {
732 atmel,pins =
733 <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
734 };
735
736 pinctrl_usart1_cts: usart1_cts-0 {
737 atmel,pins =
738 <AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
739 };
740
741 pinctrl_usart1_sck: usart1_sck-0 {
742 atmel,pins =
743 <AT91_PIOD 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
744 };
745 };
746
747 usart2 {
748 pinctrl_usart2: usart2-0 {
749 atmel,pins =
750 <AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
751 <AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
752 };
753
754 pinctrl_usart2_rts: usart2_rts-0 {
755 atmel,pins =
756 <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
757 };
758
759 pinctrl_usart2_cts: usart2_cts-0 {
760 atmel,pins =
761 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE>;
762 };
763
764 pinctrl_usart2_sck: usart2_sck-0 {
765 atmel,pins =
766 <AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE>;
767 };
768 };
769
770 usart3 {
771 pinctrl_usart3: usart3-0 {
772 atmel,pins =
773 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
774 <AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
775 };
776
777 pinctrl_usart3_rts: usart3_rts-0 {
778 atmel,pins =
779 <AT91_PIOD 4 AT91_PERIPH_B AT91_PINCTRL_NONE>;
780 };
781
782 pinctrl_usart3_cts: usart3_cts-0 {
783 atmel,pins =
784 <AT91_PIOD 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
785 };
786
787 pinctrl_usart3_sck: usart3_sck-0 {
788 atmel,pins =
789 <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>;
790 };
791 };
792
793 pioA: gpio@fffff400 {
794 compatible = "atmel,at91rm9200-gpio";
795 reg = <0xfffff400 0x200>;
796 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
797 #gpio-cells = <2>;
798 gpio-controller;
799 interrupt-controller;
800 #interrupt-cells = <2>;
801 clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
802 };
803
804 pioB: gpio@fffff600 {
805 compatible = "atmel,at91rm9200-gpio";
806 reg = <0xfffff600 0x200>;
807 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
808 #gpio-cells = <2>;
809 gpio-controller;
810 interrupt-controller;
811 #interrupt-cells = <2>;
812 clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
813 };
814
815 pioC: gpio@fffff800 {
816 compatible = "atmel,at91rm9200-gpio";
817 reg = <0xfffff800 0x200>;
818 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
819 #gpio-cells = <2>;
820 gpio-controller;
821 interrupt-controller;
822 #interrupt-cells = <2>;
823 clocks = <&pmc PMC_TYPE_PERIPHERAL 4>;
824 };
825
826 pioD: gpio@fffffa00 {
827 compatible = "atmel,at91rm9200-gpio";
828 reg = <0xfffffa00 0x200>;
829 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
830 #gpio-cells = <2>;
831 gpio-controller;
832 interrupt-controller;
833 #interrupt-cells = <2>;
834 clocks = <&pmc PMC_TYPE_PERIPHERAL 5>;
835 };
836 };
837
838 pmc: pmc@fffffc00 {
839 compatible = "atmel,at91sam9rl-pmc", "syscon";
840 reg = <0xfffffc00 0x100>;
841 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
842 #clock-cells = <2>;
843 clocks = <&clk32k>, <&main_xtal>;
844 clock-names = "slow_clk", "main_xtal";
845 };
846
847 rstc@fffffd00 {
848 compatible = "atmel,at91sam9260-rstc";
849 reg = <0xfffffd00 0x10>;
850 clocks = <&clk32k>;
851 };
852
853 shdwc@fffffd10 {
854 compatible = "atmel,at91sam9260-shdwc";
855 reg = <0xfffffd10 0x10>;
856 clocks = <&clk32k>;
857 };
858
859 pit: timer@fffffd30 {
860 compatible = "atmel,at91sam9260-pit";
861 reg = <0xfffffd30 0xf>;
862 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
863 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
864 };
865
866 watchdog@fffffd40 {
867 compatible = "atmel,at91sam9260-wdt";
868 reg = <0xfffffd40 0x10>;
869 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
870 clocks = <&clk32k>;
871 status = "disabled";
872 };
873
874 clk32k: sckc@fffffd50 {
875 compatible = "atmel,at91sam9x5-sckc";
876 reg = <0xfffffd50 0x4>;
877 clocks = <&slow_xtal>;
878 #clock-cells = <0>;
879 };
880
881 rtc@fffffd20 {
882 compatible = "atmel,at91sam9260-rtt";
883 reg = <0xfffffd20 0x10>;
884 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
885 clocks = <&clk32k>;
886 status = "disabled";
887 };
888
889 gpbr: syscon@fffffd60 {
890 compatible = "atmel,at91sam9260-gpbr", "syscon";
891 reg = <0xfffffd60 0x10>;
892 status = "disabled";
893 };
894
895 rtc@fffffe00 {
896 compatible = "atmel,at91rm9200-rtc";
897 reg = <0xfffffe00 0x40>;
898 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
899 clocks = <&clk32k>;
900 status = "disabled";
901 };
902
903 };
904 };
905
906 i2c-gpio-0 {
907 compatible = "i2c-gpio";
908 gpios = <&pioA 23 GPIO_ACTIVE_HIGH>, /* sda */
909 <&pioA 24 GPIO_ACTIVE_HIGH>; /* scl */
910 i2c-gpio,sda-open-drain;
911 i2c-gpio,scl-open-drain;
912 i2c-gpio,delay-us = <2>; /* ~100 kHz */
913 #address-cells = <1>;
914 #size-cells = <0>;
915 pinctrl-names = "default";
916 pinctrl-0 = <&pinctrl_i2c_gpio0>;
917 status = "disabled";
918 };
919
920 i2c-gpio-1 {
921 compatible = "i2c-gpio";
922 gpios = <&pioD 10 GPIO_ACTIVE_HIGH>, /* sda */
923 <&pioD 11 GPIO_ACTIVE_HIGH>; /* scl */
924 i2c-gpio,sda-open-drain;
925 i2c-gpio,scl-open-drain;
926 i2c-gpio,delay-us = <2>; /* ~100 kHz */
927 #address-cells = <1>;
928 #size-cells = <0>;
929 pinctrl-names = "default";
930 pinctrl-0 = <&pinctrl_i2c_gpio1>;
931 status = "disabled";
932 };
933};