blob: 23bd03f3e21f4ef28ec66731069de324a3a74239 [file] [log] [blame]
b.liue9582032025-04-17 19:18:16 +08001=======================================================
2Frequently asked questions about the sunxi clock system
3=======================================================
4
5This document contains useful bits of information that people tend to ask
6about the sunxi clock system, as well as accompanying ASCII art when adequate.
7
8Q: Why is the main 24MHz oscillator gatable? Wouldn't that break the
9 system?
10
11A: The 24MHz oscillator allows gating to save power. Indeed, if gated
12 carelessly the system would stop functioning, but with the right
13 steps, one can gate it and keep the system running. Consider this
14 simplified suspend example:
15
16 While the system is operational, you would see something like::
17
18 24MHz 32kHz
19 |
20 PLL1
21 \
22 \_ CPU Mux
23 |
24 [CPU]
25
26 When you are about to suspend, you switch the CPU Mux to the 32kHz
27 oscillator::
28
29 24Mhz 32kHz
30 | |
31 PLL1 |
32 /
33 CPU Mux _/
34 |
35 [CPU]
36
37 Finally you can gate the main oscillator::
38
39 32kHz
40 |
41 |
42 /
43 CPU Mux _/
44 |
45 [CPU]
46
47Q: Were can I learn more about the sunxi clocks?
48
49A: The linux-sunxi wiki contains a page documenting the clock registers,
50 you can find it at
51
52 http://linux-sunxi.org/A10/CCM
53
54 The authoritative source for information at this time is the ccmu driver
55 released by Allwinner, you can find it at
56
57 https://github.com/linux-sunxi/linux-sunxi/tree/sunxi-3.0/arch/arm/mach-sun4i/clock/ccmu