| b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame] | 1 | Bindings for the Broadcom's brcm,bcm6345-gpio memory-mapped GPIO controllers. |
| 2 | |
| 3 | These bindings can be used on any BCM63xx SoC. However, BCM6338 and BCM6345 |
| 4 | are the only ones which don't need a pinctrl driver. |
| 5 | BCM6338 have 8-bit data and dirout registers, where GPIO state can be read |
| 6 | and/or written, and the direction changed from input to output. |
| 7 | BCM6345 have 16-bit data and dirout registers, where GPIO state can be read |
| 8 | and/or written, and the direction changed from input to output. |
| 9 | |
| 10 | Required properties: |
| 11 | - compatible: should be "brcm,bcm6345-gpio" |
| 12 | - reg-names: must contain |
| 13 | "dat" - data register |
| 14 | "dirout" - direction (output) register |
| 15 | - reg: address + size pairs describing the GPIO register sets; |
| 16 | order must correspond with the order of entries in reg-names |
| 17 | - #gpio-cells: must be set to 2. The first cell is the pin number and |
| 18 | the second cell is used to specify the gpio polarity: |
| 19 | 0 = active high |
| 20 | 1 = active low |
| 21 | - gpio-controller: Marks the device node as a gpio controller. |
| 22 | |
| 23 | Optional properties: |
| 24 | - native-endian: use native endian memory. |
| 25 | |
| 26 | Examples: |
| 27 | - BCM6338: |
| 28 | gpio: gpio-controller@fffe0407 { |
| 29 | compatible = "brcm,bcm6345-gpio"; |
| 30 | reg-names = "dirout", "dat"; |
| 31 | reg = <0xfffe0407 1>, <0xfffe040f 1>; |
| 32 | |
| 33 | #gpio-cells = <2>; |
| 34 | gpio-controller; |
| 35 | }; |
| 36 | |
| 37 | - BCM6345: |
| 38 | gpio: gpio-controller@fffe0406 { |
| 39 | compatible = "brcm,bcm6345-gpio"; |
| 40 | reg-names = "dirout", "dat"; |
| 41 | reg = <0xfffe0406 2>, <0xfffe040a 2>; |
| 42 | native-endian; |
| 43 | |
| 44 | #gpio-cells = <2>; |
| 45 | gpio-controller; |
| 46 | }; |