| b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame] | 1 | * Freescale i.MX/MXC GPIO controller |
| 2 | |
| 3 | Required properties: |
| 4 | - compatible : Should be "fsl,<soc>-gpio" |
| 5 | - reg : Address and length of the register set for the device |
| 6 | - interrupts : Should be the port interrupt shared by all 32 pins, if |
| 7 | one number. If two numbers, the first one is the interrupt shared |
| 8 | by low 16 pins and the second one is for high 16 pins. |
| 9 | - gpio-controller : Marks the device node as a gpio controller. |
| 10 | - #gpio-cells : Should be two. The first cell is the pin number and |
| 11 | the second cell is used to specify the gpio polarity: |
| 12 | 0 = active high |
| 13 | 1 = active low |
| 14 | - interrupt-controller: Marks the device node as an interrupt controller. |
| 15 | - #interrupt-cells : Should be 2. The first cell is the GPIO number. |
| 16 | The second cell bits[3:0] is used to specify trigger type and level flags: |
| 17 | 1 = low-to-high edge triggered. |
| 18 | 2 = high-to-low edge triggered. |
| 19 | 4 = active high level-sensitive. |
| 20 | 8 = active low level-sensitive. |
| 21 | |
| 22 | Optional properties: |
| 23 | - clocks: the clock for clocking the GPIO silicon |
| 24 | |
| 25 | Example: |
| 26 | |
| 27 | gpio0: gpio@73f84000 { |
| 28 | compatible = "fsl,imx51-gpio", "fsl,imx35-gpio"; |
| 29 | reg = <0x73f84000 0x4000>; |
| 30 | interrupts = <50 51>; |
| 31 | gpio-controller; |
| 32 | #gpio-cells = <2>; |
| 33 | interrupt-controller; |
| 34 | #interrupt-cells = <2>; |
| 35 | }; |