| b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame] | 1 | General Purpose I2C Bus Mux |
| 2 | |
| 3 | This binding describes an I2C bus multiplexer that uses a mux controller |
| 4 | from the mux subsystem to route the I2C signals. |
| 5 | |
| 6 | .-----. .-----. |
| 7 | | dev | | dev | |
| 8 | .------------. '-----' '-----' |
| 9 | | SoC | | | |
| 10 | | | .--------+--------' |
| 11 | | .------. | .------+ child bus A, on MUX value set to 0 |
| 12 | | | I2C |-|--| Mux | |
| 13 | | '------' | '--+---+ child bus B, on MUX value set to 1 |
| 14 | | .------. | | '----------+--------+--------. |
| 15 | | | MUX- | | | | | | |
| 16 | | | Ctrl |-|-----+ .-----. .-----. .-----. |
| 17 | | '------' | | dev | | dev | | dev | |
| 18 | '------------' '-----' '-----' '-----' |
| 19 | |
| 20 | Required properties: |
| 21 | - compatible: i2c-mux |
| 22 | - i2c-parent: The phandle of the I2C bus that this multiplexer's master-side |
| 23 | port is connected to. |
| 24 | - mux-controls: The phandle of the mux controller to use for operating the |
| 25 | mux. |
| 26 | * Standard I2C mux properties. See i2c-mux.txt in this directory. |
| 27 | * I2C child bus nodes. See i2c-mux.txt in this directory. The sub-bus number |
| 28 | is also the mux-controller state described in ../mux/mux-controller.txt |
| 29 | |
| 30 | Optional properties: |
| 31 | - mux-locked: If present, explicitly allow unrelated I2C transactions on the |
| 32 | parent I2C adapter at these times: |
| 33 | + during setup of the multiplexer |
| 34 | + between setup of the multiplexer and the child bus I2C transaction |
| 35 | + between the child bus I2C transaction and releasing of the multiplexer |
| 36 | + during releasing of the multiplexer |
| 37 | However, I2C transactions to devices behind all I2C multiplexers connected |
| 38 | to the same parent adapter that this multiplexer is connected to are blocked |
| 39 | for the full duration of the complete multiplexed I2C transaction (i.e. |
| 40 | including the times covered by the above list). |
| 41 | If mux-locked is not present, the multiplexer is assumed to be parent-locked. |
| 42 | This means that no unrelated I2C transactions are allowed on the parent I2C |
| 43 | adapter for the complete multiplexed I2C transaction. |
| 44 | The properties of mux-locked and parent-locked multiplexers are discussed |
| 45 | in more detail in Documentation/i2c/i2c-topology.rst. |
| 46 | |
| 47 | For each i2c child node, an I2C child bus will be created. They will |
| 48 | be numbered based on their order in the device tree. |
| 49 | |
| 50 | Whenever an access is made to a device on a child bus, the value set |
| 51 | in the relevant node's reg property will be set as the state in the |
| 52 | mux controller. |
| 53 | |
| 54 | Example: |
| 55 | mux: mux-controller { |
| 56 | compatible = "gpio-mux"; |
| 57 | #mux-control-cells = <0>; |
| 58 | |
| 59 | mux-gpios = <&pioA 0 GPIO_ACTIVE_HIGH>, |
| 60 | <&pioA 1 GPIO_ACTIVE_HIGH>; |
| 61 | }; |
| 62 | |
| 63 | i2c-mux { |
| 64 | compatible = "i2c-mux"; |
| 65 | mux-locked; |
| 66 | i2c-parent = <&i2c1>; |
| 67 | |
| 68 | mux-controls = <&mux>; |
| 69 | |
| 70 | #address-cells = <1>; |
| 71 | #size-cells = <0>; |
| 72 | |
| 73 | i2c@1 { |
| 74 | reg = <1>; |
| 75 | #address-cells = <1>; |
| 76 | #size-cells = <0>; |
| 77 | |
| 78 | ssd1307: oled@3c { |
| 79 | compatible = "solomon,ssd1307fb-i2c"; |
| 80 | reg = <0x3c>; |
| 81 | pwms = <&pwm 4 3000>; |
| 82 | reset-gpios = <&gpio2 7 1>; |
| 83 | reset-active-low; |
| 84 | }; |
| 85 | }; |
| 86 | |
| 87 | i2c@3 { |
| 88 | reg = <3>; |
| 89 | #address-cells = <1>; |
| 90 | #size-cells = <0>; |
| 91 | |
| 92 | pca9555: pca9555@20 { |
| 93 | compatible = "nxp,pca9555"; |
| 94 | gpio-controller; |
| 95 | #gpio-cells = <2>; |
| 96 | reg = <0x20>; |
| 97 | }; |
| 98 | }; |
| 99 | }; |