| b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame] | 1 | * Renesas R-Car PWM Timer Controller |
| 2 | |
| 3 | Required Properties: |
| 4 | - compatible: should be "renesas,pwm-rcar" and one of the following. |
| 5 | - "renesas,pwm-r8a7743": for RZ/G1M |
| 6 | - "renesas,pwm-r8a7744": for RZ/G1N |
| 7 | - "renesas,pwm-r8a7745": for RZ/G1E |
| 8 | - "renesas,pwm-r8a774a1": for RZ/G2M |
| 9 | - "renesas,pwm-r8a774c0": for RZ/G2E |
| 10 | - "renesas,pwm-r8a7778": for R-Car M1A |
| 11 | - "renesas,pwm-r8a7779": for R-Car H1 |
| 12 | - "renesas,pwm-r8a7790": for R-Car H2 |
| 13 | - "renesas,pwm-r8a7791": for R-Car M2-W |
| 14 | - "renesas,pwm-r8a7794": for R-Car E2 |
| 15 | - "renesas,pwm-r8a7795": for R-Car H3 |
| 16 | - "renesas,pwm-r8a7796": for R-Car M3-W |
| 17 | - "renesas,pwm-r8a77965": for R-Car M3-N |
| 18 | - "renesas,pwm-r8a77970": for R-Car V3M |
| 19 | - "renesas,pwm-r8a77980": for R-Car V3H |
| 20 | - "renesas,pwm-r8a77990": for R-Car E3 |
| 21 | - "renesas,pwm-r8a77995": for R-Car D3 |
| 22 | - reg: base address and length of the registers block for the PWM. |
| 23 | - #pwm-cells: should be 2. See pwm.txt in this directory for a description of |
| 24 | the cells format. |
| 25 | - clocks: clock phandle and specifier pair. |
| 26 | - pinctrl-0: phandle, referring to a default pin configuration node. |
| 27 | - pinctrl-names: Set to "default". |
| 28 | |
| 29 | Example: R8A7743 (RZ/G1M) PWM Timer node |
| 30 | |
| 31 | pwm0: pwm@e6e30000 { |
| 32 | compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar"; |
| 33 | reg = <0 0xe6e30000 0 0x8>; |
| 34 | clocks = <&cpg CPG_MOD 523>; |
| 35 | power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; |
| 36 | resets = <&cpg 523>; |
| 37 | #pwm-cells = <2>; |
| 38 | pinctrl-0 = <&pwm0_pins>; |
| 39 | pinctrl-names = "default"; |
| 40 | }; |