| b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame] | 1 | * MSM Timer |
| 2 | |
| 3 | Properties: |
| 4 | |
| 5 | - compatible : Should at least contain "qcom,msm-timer". More specific |
| 6 | properties specify which subsystem the timers are paired with. |
| 7 | |
| 8 | "qcom,kpss-timer" - krait subsystem |
| 9 | "qcom,scss-timer" - scorpion subsystem |
| 10 | |
| 11 | - interrupts : Interrupts for the debug timer, the first general purpose |
| 12 | timer, and optionally a second general purpose timer, and |
| 13 | optionally as well, 2 watchdog interrupts, in that order. |
| 14 | |
| 15 | - reg : Specifies the base address of the timer registers. |
| 16 | |
| 17 | - clocks: Reference to the parent clocks, one per output clock. The parents |
| 18 | must appear in the same order as the clock names. |
| 19 | |
| 20 | - clock-names: The name of the clocks as free-form strings. They should be in |
| 21 | the same order as the clocks. |
| 22 | |
| 23 | - clock-frequency : The frequency of the debug timer and the general purpose |
| 24 | timer(s) in Hz in that order. |
| 25 | |
| 26 | Optional: |
| 27 | |
| 28 | - cpu-offset : per-cpu offset used when the timer is accessed without the |
| 29 | CPU remapping facilities. The offset is |
| 30 | cpu-offset + (0x10000 * cpu-nr). |
| 31 | |
| 32 | Example: |
| 33 | |
| 34 | timer@200a000 { |
| 35 | compatible = "qcom,scss-timer", "qcom,msm-timer"; |
| 36 | interrupts = <1 1 0x301>, |
| 37 | <1 2 0x301>, |
| 38 | <1 3 0x301>, |
| 39 | <1 4 0x301>, |
| 40 | <1 5 0x301>; |
| 41 | reg = <0x0200a000 0x100>; |
| 42 | clock-frequency = <19200000>, |
| 43 | <32768>; |
| 44 | clocks = <&sleep_clk>; |
| 45 | clock-names = "sleep"; |
| 46 | cpu-offset = <0x40000>; |
| 47 | }; |