| b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame] | 1 | Rockchip rk timer |
| 2 | |
| 3 | Required properties: |
| 4 | - compatible: should be: |
| 5 | "rockchip,rv1108-timer", "rockchip,rk3288-timer": for Rockchip RV1108 |
| 6 | "rockchip,rk3036-timer", "rockchip,rk3288-timer": for Rockchip RK3036 |
| 7 | "rockchip,rk3066-timer", "rockchip,rk3288-timer": for Rockchip RK3066 |
| 8 | "rockchip,rk3188-timer", "rockchip,rk3288-timer": for Rockchip RK3188 |
| 9 | "rockchip,rk3228-timer", "rockchip,rk3288-timer": for Rockchip RK3228 |
| 10 | "rockchip,rk3229-timer", "rockchip,rk3288-timer": for Rockchip RK3229 |
| 11 | "rockchip,rk3288-timer": for Rockchip RK3288 |
| 12 | "rockchip,rk3368-timer", "rockchip,rk3288-timer": for Rockchip RK3368 |
| 13 | "rockchip,rk3399-timer": for Rockchip RK3399 |
| 14 | - reg: base address of the timer register starting with TIMERS CONTROL register |
| 15 | - interrupts: should contain the interrupts for Timer0 |
| 16 | - clocks : must contain an entry for each entry in clock-names |
| 17 | - clock-names : must include the following entries: |
| 18 | "timer", "pclk" |
| 19 | |
| 20 | Example: |
| 21 | timer: timer@ff810000 { |
| 22 | compatible = "rockchip,rk3288-timer"; |
| 23 | reg = <0xff810000 0x20>; |
| 24 | interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; |
| 25 | clocks = <&xin24m>, <&cru PCLK_TIMER>; |
| 26 | clock-names = "timer", "pclk"; |
| 27 | }; |