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192.168.1.100 / T108 / c2023d5d03be91dbb983606f0ec5e9e4ea36c8c2 / . / marvell / linux / arch / arm / boot / dts / aspeed-bmc-facebook-tiogapass.dts
blob: c58230fea45f89c04a920ae0cde2e54c07b17d13 [file] [log] [blame]
b.liue9582032025-04-17 19:18:16 +0800[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+
2// Copyright (c) 2018 Facebook Inc.
3// Author: Vijay Khemka <vijaykhemka@fb.com>
4/dts-v1/;
5
6#include "aspeed-g5.dtsi"
7#include <dt-bindings/gpio/aspeed-gpio.h>
8
9/ {
10 model = "Facebook TiogaPass BMC";
11 compatible = "facebook,tiogapass-bmc", "aspeed,ast2500";
12 aliases {
13 serial0 = &uart1;
14 serial4 = &uart5;
15
16 /*
17 * Hardcode the bus number of i2c switches' channels to
18 * avoid breaking the legacy applications.
19 */
20 i2c16 = &imux16;
21 i2c17 = &imux17;
22 i2c18 = &imux18;
23 i2c19 = &imux19;
24 i2c20 = &imux20;
25 i2c21 = &imux21;
26 i2c22 = &imux22;
27 i2c23 = &imux23;
28 i2c24 = &imux24;
29 i2c25 = &imux25;
30 i2c26 = &imux26;
31 i2c27 = &imux27;
32 i2c28 = &imux28;
33 i2c29 = &imux29;
34 i2c30 = &imux30;
35 i2c31 = &imux31;
36 };
37 chosen {
38 stdout-path = &uart5;
39 bootargs = "console=ttyS4,115200 earlyprintk";
40 };
41
42 memory@80000000 {
43 reg = <0x80000000 0x20000000>;
44 };
45
46 iio-hwmon {
47 compatible = "iio-hwmon";
48 io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
49 <&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>;
50 };
51
52};
53
54&fmc {
55 status = "okay";
56 flash@0 {
57 status = "okay";
58 m25p,fast-read;
59#include "openbmc-flash-layout.dtsi"
60 };
61};
62
63&spi1 {
64 status = "okay";
65 pinctrl-names = "default";
66 pinctrl-0 = <&pinctrl_spi1_default>;
67 flash@0 {
68 status = "okay";
69 m25p,fast-read;
70 label = "pnor";
71 };
72};
73
74&lpc_snoop {
75 status = "okay";
76 snoop-ports = <0x80>;
77};
78
79&lpc_ctrl {
80 // Enable lpc clock
81 status = "okay";
82};
83
84&uart1 {
85 // Host Console
86 status = "okay";
87 pinctrl-names = "default";
88 pinctrl-0 = <&pinctrl_txd1_default
89 &pinctrl_rxd1_default>;
90};
91
92&uart2 {
93 // SoL Host Console
94 status = "okay";
95};
96
97&uart3 {
98 // SoL BMC Console
99 status = "okay";
100};
101
102&uart5 {
103 // BMC Console
104 status = "okay";
105};
106
107&kcs2 {
108 // BMC KCS channel 2
109 status = "okay";
110 kcs_addr = <0xca8>;
111};
112
113&kcs3 {
114 // BMC KCS channel 3
115 status = "okay";
116 kcs_addr = <0xca2>;
117};
118
119&mac0 {
120 status = "okay";
121
122 pinctrl-names = "default";
123 pinctrl-0 = <&pinctrl_rmii1_default>;
124 use-ncsi;
125};
126
127&adc {
128 status = "okay";
129};
130
131&i2c0 {
132 status = "okay";
133 //Airmax Conn B, CPU0 PIROM, CPU1 PIROM
134};
135
136&i2c1 {
137 status = "okay";
138 //X24 Riser
139 i2c-switch@71 {
140 compatible = "nxp,pca9544";
141 #address-cells = <1>;
142 #size-cells = <0>;
143 reg = <0x71>;
144
145 imux16: i2c@0 {
146 #address-cells = <1>;
147 #size-cells = <0>;
148 reg = <0>;
149
150 ina230@45 {
151 compatible = "ti,ina230";
152 reg = <0x45>;
153 };
154
155 tmp75@48 {
156 compatible = "ti,tmp75";
157 reg = <0x48>;
158 };
159
160 tmp421@49 {
161 compatible = "ti,tmp75";
162 reg = <0x49>;
163 };
164
165 eeprom@50 {
166 compatible = "atmel,24c64";
167 reg = <0x50>;
168 pagesize = <32>;
169 };
170
171 i2c-switch@73 {
172 compatible = "nxp,pca9546";
173 #address-cells = <1>;
174 #size-cells = <0>;
175 reg = <0x73>;
176
177 imux20: i2c@0 {
178 #address-cells = <1>;
179 #size-cells = <0>;
180 reg = <0>;
181 };
182
183 imux21: i2c@1 {
184 #address-cells = <1>;
185 #size-cells = <0>;
186 reg = <1>;
187 };
188
189 imux22: i2c@2 {
190 #address-cells = <1>;
191 #size-cells = <0>;
192 reg = <2>;
193 };
194
195 imux23: i2c@3 {
196 #address-cells = <1>;
197 #size-cells = <0>;
198 reg = <3>;
199 };
200
201 };
202
203 };
204
205 imux17: i2c@1 {
206 #address-cells = <1>;
207 #size-cells = <0>;
208 reg = <1>;
209
210 ina230@45 {
211 compatible = "ti,ina230";
212 reg = <0x45>;
213 };
214
215 tmp421@48 {
216 compatible = "ti,tmp75";
217 reg = <0x48>;
218 };
219
220 tmp421@49 {
221 compatible = "ti,tmp75";
222 reg = <0x49>;
223 };
224
225 eeprom@50 {
226 compatible = "atmel,24c64";
227 reg = <0x50>;
228 pagesize = <32>;
229 };
230
231 i2c-switch@73 {
232 compatible = "nxp,pca9546";
233 #address-cells = <1>;
234 #size-cells = <0>;
235 reg = <0x73>;
236
237 imux24: i2c@0 {
238 #address-cells = <1>;
239 #size-cells = <0>;
240 reg = <0>;
241 };
242
243 imux25: i2c@1 {
244 #address-cells = <1>;
245 #size-cells = <0>;
246 reg = <1>;
247 };
248
249 imux26: i2c@2 {
250 #address-cells = <1>;
251 #size-cells = <0>;
252 reg = <2>;
253 };
254
255 imux27: i2c@3 {
256 #address-cells = <1>;
257 #size-cells = <0>;
258 reg = <3>;
259 };
260
261 };
262
263 };
264
265 imux18: i2c@2 {
266 #address-cells = <1>;
267 #size-cells = <0>;
268 reg = <2>;
269
270 ina230@45 {
271 compatible = "ti,ina230";
272 reg = <0x45>;
273 };
274
275 tmp421@48 {
276 compatible = "ti,tmp75";
277 reg = <0x48>;
278 };
279
280 tmp421@49 {
281 compatible = "ti,tmp75";
282 reg = <0x49>;
283 };
284
285 eeprom@50 {
286 compatible = "atmel,24c64";
287 reg = <0x50>;
288 pagesize = <32>;
289 };
290
291 i2c-switch@73 {
292 compatible = "nxp,pca9546";
293 #address-cells = <1>;
294 #size-cells = <0>;
295 reg = <0x73>;
296
297 imux28: i2c@0 {
298 #address-cells = <1>;
299 #size-cells = <0>;
300 reg = <0>;
301 };
302
303 imux29: i2c@1 {
304 #address-cells = <1>;
305 #size-cells = <0>;
306 reg = <1>;
307 };
308
309 imux30: i2c@2 {
310 #address-cells = <1>;
311 #size-cells = <0>;
312 reg = <2>;
313 };
314
315 imux31: i2c@3 {
316 #address-cells = <1>;
317 #size-cells = <0>;
318 reg = <3>;
319 };
320
321 };
322
323 };
324
325 imux19: i2c@3 {
326 #address-cells = <1>;
327 #size-cells = <0>;
328 reg = <3>;
329
330 i2c-switch@40 {
331 compatible = "ti,ina230";
332 reg = <0x40>;
333 };
334
335 i2c-switch@41 {
336 compatible = "ti,ina230";
337 reg = <0x41>;
338 };
339
340 i2c-switch@45 {
341 compatible = "ti,ina230";
342 reg = <0x45>;
343 };
344
345 };
346
347 };
348};
349
350&i2c2 {
351 status = "okay";
352 // Mezz Management SMBus
353};
354
355&i2c3 {
356 status = "okay";
357 // SMBus to Board ID EEPROM
358};
359
360&i2c4 {
361 status = "okay";
362 // BMC Debug Header
363};
364
365&i2c5 {
366 status = "okay";
367 // CPU Voltage regulators
368 regulator@48 {
369 compatible = "infineon,pxe1610";
370 reg = <0x48>;
371 };
372 regulator@4a {
373 compatible = "infineon,pxe1610";
374 reg = <0x4a>;
375 };
376 regulator@50 {
377 compatible = "infineon,pxe1610";
378 reg = <0x50>;
379 };
380 regulator@52 {
381 compatible = "infineon,pxe1610";
382 reg = <0x52>;
383 };
384 regulator@58 {
385 compatible = "infineon,pxe1610";
386 reg = <0x58>;
387 };
388 regulator@5a {
389 compatible = "infineon,pxe1610";
390 reg = <0x5a>;
391 };
392 regulator@68 {
393 compatible = "infineon,pxe1610";
394 reg = <0x68>;
395 };
396 regulator@70 {
397 compatible = "infineon,pxe1610";
398 reg = <0x70>;
399 };
400 regulator@72 {
401 compatible = "infineon,pxe1610";
402 reg = <0x72>;
403 };
404};
405
406&i2c6 {
407 status = "okay";
408 tpm@20 {
409 compatible = "infineon,slb9645tt";
410 reg = <0x20>;
411 };
412 tmp421@4e {
413 compatible = "ti,tmp421";
414 reg = <0x4e>;
415 };
416 tmp421@4f {
417 compatible = "ti,tmp421";
418 reg = <0x4f>;
419 };
420 eeprom@54 {
421 compatible = "atmel,24c64";
422 reg = <0x54>;
423 pagesize = <32>;
424 };
425};
426
427&i2c7 {
428 status = "okay";
429 //HSC, AirMax Conn A
430};
431
432&i2c8 {
433 status = "okay";
434 tmp421@1f {
435 compatible = "ti,tmp421";
436 reg = <0x1f>;
437 };
438 //Mezz Sensor SMBus
439};
440
441&i2c9 {
442 status = "okay";
443 //USB Debug Connector
444};
445
446&pwm_tacho {
447 status = "okay";
448 pinctrl-names = "default";
449 pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default>;
450 fan@0 {
451 reg = <0x00>;
452 aspeed,fan-tach-ch = /bits/ 8 <0x00>;
453 };
454
455 fan@1 {
456 reg = <0x01>;
457 aspeed,fan-tach-ch = /bits/ 8 <0x02>;
458 };
459};