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192.168.1.100 / T108 / c2023d5d03be91dbb983606f0ec5e9e4ea36c8c2 / . / marvell / linux / arch / arm / boot / dts / asr1903-p503.dts
blob: 4079caf9ca876fb419b97d25f79c4ed4265a196d [file] [log] [blame]
b.liue9582032025-04-17 19:18:16 +0800[diff] [blame]1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2023 ASR Microelectronics
4 */
5
6/dts-v1/;
7#include "asr1903.dtsi"
8
9/ {
10 model = "ASR 1903(LAPWING) EVB Board";
11 compatible = "asr,1803-evb", "asr,1803";
12
13 memory {
14 reg = <0x00000000 0x10000000>;
15 };
16
17 firmware {
18 optee {
19 compatible = "linaro,optee-tz";
20 method = "smc";
21 };
22 };
23
24 soc {
25 axi@d4200000 { /* AXI */
26 usb3phy: usb3phy@c0030000 {
27 status = "okay";
28 };
29#ifndef CONFIG_USB_DWC3_ASR_OTG
30 usb3_0: usb3-0 {
31 status = "okay";
32 };
33#else
34 usb3_0_otg: usb3-0-otg {
35 pinctrl-names = "default","sleep";
36 pinctrl-0 = <&usb_id_pinmux &usb_host_pinmux>;
37 pinctrl-1 = <&usb_id_pinmux_slp &usb_host_pinmux>;
38 usbid_gpio = <99>;
39 edge_detect_gpio = <99>;
40 otg,use-gpio-vbus;
41 gpio-num = <122>;
42 status = "okay";
43 };
44#endif
45 qspi: spi@0xd420b000 {
46 asr,qspi-freq = <78000000>;
47 status = "okay";
48 };
49 /* SD card */
50 sdh0: sdh@d4280000 {
51 pinctrl-names = "default", "slow", "fast";
52 pinctrl-0 = <&sdh0_pmx_func1 &sdh0_pmx_func2 &sdh0_pmx_func3>;
53 pinctrl-1 = <&sdh0_pmx_func1_slow &sdh0_pmx_func2_slow &sdh0_pmx_func3>;
54 pinctrl-2 = <&sdh0_pmx_func1_fast &sdh0_pmx_func2_fast &sdh0_pmx_func3>;
55 vmmc-supply = <&vcc_sdh1>;
56 vqmmc-supply = <&pm802ldo6>;
57 bus-width = <4>;
58 no-mmc;
59 no-sdio;
60 non-removable;
61 broken-cd;
62 wp-inverted;
63 asr,sdh-pm-runtime-en;
64 asr,sdh-host-caps-disable = <(MMC_CAP_UHS_SDR104)>;
65 asr,sdh-quirks = <(
66 SDHCI_QUIRK_BROKEN_CARD_DETECTION |
67 SDHCI_QUIRK_BROKEN_TIMEOUT_VAL
68 )>;
69 asr,sdh-quirks2 = <(
70 SDHCI_QUIRK2_SET_AIB_MMC |
71 SDHCI_QUIRK2_PRESET_VALUE_BROKEN
72 )>;
73 /* prop "sdh-dtr-data":
74 <timing preset_rate src_rate tx_delay rx_delay tx_dline_reg rx_dline_reg> */
75 asr,sdh-dtr-data =
76 <PXA_MMC_TIMING_LEGACY PXA_SDH_DTR_26M PXA_SDH_DTR_104M 0 0 0 0>,
77 <PXA_MMC_TIMING_SD_HS PXA_SDH_DTR_52M PXA_SDH_DTR_104M 0 0 0 0>,
78 <PXA_MMC_TIMING_UHS_DDR50 PXA_SDH_DTR_52M PXA_SDH_DTR_104M 0 0 0 3>,
79 <PXA_MMC_TIMING_UHS_SDR50 PXA_SDH_DTR_104M PXA_SDH_DTR_208M 0 0 0 0>,
80 <PXA_MMC_TIMING_UHS_SDR104 PXA_SDH_DTR_208M PXA_SDH_DTR_208M 0 0 0 0>,
81 <PXA_MMC_TIMING_MAX PXA_SDH_DTR_PS_NONE PXA_SDH_DTR_104M 0 0 0 0>;
82 status = "okay";
83 };
84
85 /* SDIO */
86 sdh1: sdh@d4280800 {
87 pinctrl-names = "default", "fast", "sleep";
88 pinctrl-0 = <&sdh1_pmx_func1 &sdh1_pmx_func2 &sdh1_pmx_func3>;
89 pinctrl-1 = <&sdh1_pmx_func1_fast &sdh1_pmx_func2_fast &sdh1_pmx_func3>;
90 pinctrl-2 = <&sdh1_pmx_edge_wakeup>;
91 bus-width = <4>;
92 no-mmc;
93 no-sd;
94 non-removable;
95 keep-power-in-suspend;
96 enable-sdio-wakeup;
97 /* clk-scaling-config:
98 <up_threshold down_threshold polling_interval> */
99 clk-scaling-config = <25 12 200>;
100 min-ddr-qos = <156000 312000 400000>;
101 asr,sdh-pm-runtime-en;
102 asr,sdh-quirks = <(
103 SDHCI_QUIRK_BROKEN_CARD_DETECTION |
104 SDHCI_QUIRK_BROKEN_TIMEOUT_VAL
105 )>;
106 asr,sdh-quirks2 = <(
107 SDHCI_QUIRK2_NO_TIMER_RETUNING |
108 SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
109 SDHCI_QUIRK2_BASE_CLOCK_ALWAYS_ON
110 )>;
111 asr,sdh-pm-caps = <(MMC_PM_KEEP_POWER)>;
112 asr,sdh-host-caps2 = <(
113 MMC_CAP2_ONLY_1_8V |
114 MMC_CAP2_DISABLE_PROBE_CDSCAN |
115 MMC_CAP2_CLK_SCALE |
116 MMC_CAP2_BUS_CLK_NO_SCALE
117 )>;
118 /* prop "sdh-dtr-data":
119 <timing preset_rate src_rate tx_delay rx_delay tx_dline_reg rx_dline_reg> */
120 asr,sdh-dtr-data =
121 <PXA_MMC_TIMING_LEGACY PXA_SDH_DTR_26M PXA_SDH_DTR_104M 0 0 0 0>,
122 <PXA_MMC_TIMING_SD_HS PXA_SDH_DTR_45M PXA_SDH_DTR_89M 0 0 0 0>,
123 <PXA_MMC_TIMING_UHS_DDR50 PXA_SDH_DTR_52M PXA_SDH_DTR_104M 0 0 0 3>,
124 <PXA_MMC_TIMING_UHS_SDR50 PXA_SDH_DTR_83M PXA_SDH_DTR_83M 0 0 0 3>,
125 <PXA_MMC_TIMING_UHS_SDR104 PXA_SDH_DTR_208M PXA_SDH_DTR_208M 0 0 0 0>,
126 <PXA_MMC_TIMING_MAX PXA_SDH_DTR_PS_NONE PXA_SDH_DTR_89M 0 0 0 0>;
127 status = "okay";
128 };
129 };
130
131 apb@d4000000 {
132#ifdef CONFIG_BACKLIGHT_PWM
133 pwm2: pwm@d401a800 {
134 pinctrl-names = "default";
135 pinctrl-0 = <&pinctrl_pwm2>;
136 status = "okay";
137 };
138#endif
139
140 mfpr: mfpr@d401e000 {
141 status = "okay";
142 /* intend to replace lpm-board-cfg
143 no-apbsd-in-d1pp = <0x1>; //"wakeup-state-d1pp"
144 pin1:pin1@d401e01B0 {
145 offset = <0x1B0>;
146 udr-cfg = <0xA040>;
147 };
148 pin2:pin2@d401e01B4 {
149 offset = <0x1B4>;
150 udr-cfg = <0xA040>;
151 };
152 */
153 };
154 timer0: timer@d4014000 {
155 status = "okay";
156 };
157 /* ap uart */
158 uart3: uart@d401f000 { /* nezhas evb use ap uart */
159 pinctrl-names = "default","sleep";
160 pinctrl-0 = <&uart3_pmx_func1 &uart3_pmx_func2>;
161 pinctrl-1 = <&uart3_pmx_func1_sleep &uart3_pmx_func2>;
162 edge-wakeup-gpio = <&gpio 29 0>; /* GPIO29: AP UART rx pin */
163 status = "okay";
164 };
165 rtc: rtc@d4010000 {
166 status = "okay";
167 };
168 pmx: pinmux@d401e000 {
169 /* pin base = base_addr / 4, nr pins & gpio function */
170 pinctrl-single,gpio-range = <
171 /*
172 * GPIO number is hardcoded for range at here.
173 * In gpio chip, GPIO number is not hardcoded for range.
174 * Since one gpio pin may be routed to multiple pins,
175 * define these gpio range in pxa910-dkb.dts not pxa910.dtsi.
176 */
177 /*&range 80 4 0 */ /* GPIO25 ~ GPIO28 */
178 &range 55 32 0 /* GPIO0 ~ GPIO31 */
179 &range 87 32 0 /* GPIO32 ~ GPIO63 */
180 &range 119 32 0 /* GPIO64 ~ GPIO95 */
181 &range 151 32 0 /* GPIO96 ~ GPIO127 */
182 >;
183
184 ssp0_pmx_func: ssp0_pmx_func {
185 pinctrl-single,pins = <
186 GPIO36 AF1 /* TXD */
187 GPIO35 AF1 /* RXD */
188 GPIO34 AF1 /* FRM */
189 GPIO33 AF1 /* SCLK */
190 >;
191 DS_MEDIUM;PULL_NONE;EDGE_NONE;SL_NORMAL;
192 };
193 lcd_bl_func: lcd_bl_func {
194 pinctrl-single,pins = <
195#ifndef CONFIG_BACKLIGHT_PWM
196 VCXO_OUT AF1 /* GPIO127, lcd bl */
197#endif
198 GPIO24 AF0 /* reset */
199 GPIO22 AF0 /* lcd d/c */
200 >;
201 MFP_DEFAULT;
202 };
203
204#ifdef CONFIG_BACKLIGHT_PWM
205 pinctrl_pwm2: pmw2grp {
206 pinctrl-single,pins = <
207 VCXO_OUT AF2 /* pwm2 */
208 >;
209 DS_MEDIUM;PULL_UP;EDGE_NONE;LPM_NONE;
210 };
211#endif
212
213 twsi0_pmx_func: twsi0_pmx_func {
214 pinctrl-single,pins = <
215 GPIO49 AF1
216 GPIO50 AF1
217 >;
218 MFP_LPM_FLOAT;
219 };
220 twsi0_pmx_gpio: twsi0_pmx_gpio {
221 pinctrl-single,pins = <
222 GPIO49 AF0
223 GPIO50 AF0
224 >;
225 MFP_LPM_FLOAT;
226 };
227 twsi1_pmx_func: twsi1_pmx_func {
228 pinctrl-single,pins = <
229 GPIO10 AF1
230 GPIO11 AF1
231 >;
232 MFP_LPM_FLOAT;
233 };
234 twsi1_pmx_gpio: twsi1_pmx_gpio {
235 pinctrl-single,pins = <
236 GPIO10 AF0
237 GPIO11 AF0
238 >;
239 MFP_LPM_FLOAT;
240 };
241 /* no pull, no LPM */
242 dvc_pmx_func: dvc_pmx_func {
243 /* hw-dvc */
244 pinctrl-single,pins = <
245 TDS_DIO0 AF0
246 TDS_DIO1 AF0
247 >;
248 DS_MEDIUM;PULL_FLOAT;EDGE_NONE;SL_NORMAL;
249 };
250 leds_pmx_func: leds_pmx_func {
251 pinctrl-single,pins = <
252 DF_IO10 AF1
253 DF_IO11 AF1
254 DF_IO12 AF1
255 >;
256 DS_MEDIUM;PULL_FLOAT;EDGE_NONE;SL_NORMAL;
257 };
258
259 uart3_pmx_func1: uart3_pmx_func1 {
260 pinctrl-single,pins = <
261 GPIO29 AF1
262 >;
263 MFP_DEFAULT;
264 };
265 uart3_pmx_func2: uart3_pmx_func2 {
266 pinctrl-single,pins = <
267 GPIO30 AF1
268 >;
269 MFP_DEFAULT;
270 };
271 uart3_pmx_func1_sleep: uart3_pmx_func1_sleep {
272 pinctrl-single,pins = <
273 GPIO29 AF1
274 >;
275 DS_MEDIUM;PULL_NONE;EDGE_BOTH;SL_NORMAL;
276 };
277 panel_rst_func: panel_rst_func {
278 pinctrl-single,pins = <
279 DF_nCS1 AF1
280 >;
281 DS_MEDIUM;PULL_FLOAT;EDGE_NONE;SL_NORMAL;
282 };
283
284 sd_ldo_en: sd_ldo_en {
285 pinctrl-single,pins = <
286 GPIO19 AF0
287 >;
288 MFP_PULL_DOWN;
289 };
290 sdh0_pmx_func1: sdh0_pmx_func1 {
291 pinctrl-single,pins = <
292 MMC1_DAT3 AF0
293 MMC1_DAT2 AF0
294 MMC1_DAT1 AF0
295 MMC1_DAT0 AF0
296 MMC1_CMD AF0
297 >;
298 DS_MEDIUM;PULL_NONE;EDGE_NONE;SL_NORMAL;
299 };
300 sdh0_pmx_func2: sdh0_pmx_func2 {
301 pinctrl-single,pins = <
302 MMC1_CLK AF0
303 >;
304 DS_MEDIUM;PULL_NONE;EDGE_NONE;
305 };
306 sdh0_pmx_func3: sdh0_pmx_func3 {
307 pinctrl-single,pins = <
308 MMC1_CD AF0
309 >;
310 MFP_PULL_UP;
311 };
312 sdh0_pmx_func1_slow: sdh0_pmx_func1_slow {
313 pinctrl-single,pins = <
314 MMC1_DAT3 AF0
315 MMC1_DAT2 AF0
316 MMC1_DAT1 AF0
317 MMC1_DAT0 AF0
318 MMC1_CMD AF0
319 >;
320 DS_FAST0;PULL_NONE;EDGE_NONE;SL_NORMAL;
321 };
322 sdh0_pmx_func2_slow: sdh0_pmx_func2_slow {
323 pinctrl-single,pins = <
324 MMC1_CLK AF0
325 >;
326 DS_FAST0;PULL_NONE;EDGE_NONE;
327 };
328 sdh0_pmx_func1_fast: sdh0_pmx_func1_fast {
329 pinctrl-single,pins = <
330 MMC1_DAT3 AF0
331 MMC1_DAT2 AF0
332 MMC1_DAT1 AF0
333 MMC1_DAT0 AF0
334 MMC1_CMD AF0
335 >;
336 DS_FAST1;PULL_NONE;EDGE_NONE;SL_NORMAL;
337 };
338 sdh0_pmx_func2_fast: sdh0_pmx_func2_fast {
339 pinctrl-single,pins = <
340 MMC1_CLK AF0
341 >;
342 DS_FAST1;PULL_NONE;EDGE_NONE;
343 };
344 sdh1_pmx_func1_fast: sdh1_pmx_func1_fast {
345 pinctrl-single,pins = <
346 TDS_DIO13 AF0 /* WLAN_DAT3 */
347 TDS_DIO14 AF0 /* WLAN_DAT2 */
348 TDS_DIO15 AF0 /* WLAN_DAT1 */
349 TDS_DIO16 AF0 /* WLAN_DAT0 */
350 TDS_DIO17 AF0 /* WLAN_CMD */
351 >;
352 DS_FAST0;PULL_NONE;EDGE_NONE;SL_NORMAL;
353 };
354 sdh1_pmx_func2_fast: sdh1_pmx_func2_fast {
355 pinctrl-single,pins = <
356 TDS_DIO18 AF0 /* WLAN_CLK */
357 >;
358 DS_FAST0;PULL_DOWN;EDGE_NONE;SL_NORMAL;
359 };
360 sdh1_pmx_func1: sdh1_pmx_func1 {
361 pinctrl-single,pins = <
362 TDS_DIO13 AF0 /* WLAN_DAT3 */
363 TDS_DIO14 AF0 /* WLAN_DAT2 */
364 TDS_DIO15 AF0 /* WLAN_DAT1 */
365 TDS_DIO16 AF0 /* WLAN_DAT0 */
366 TDS_DIO17 AF0 /* WLAN_CMD */
367 >;
368 DS_MEDIUM;PULL_NONE;EDGE_NONE;SL_LOW;
369 };
370 sdh1_pmx_func2: sdh1_pmx_func2 {
371 pinctrl-single,pins = <
372 TDS_DIO18 AF0 /* WLAN_CLK */
373 >;
374 DS_MEDIUM;PULL_DOWN;EDGE_NONE;SL_LOW;
375 };
376 sdh1_pmx_func3: sdh1_pmx_func3 {
377 pinctrl-single,pins = <
378 GPIO37 AF0 /* VCXO_REQ AF1 WLAN_WAKE_HOST */
379 >;
380 MFP_PULL_DOWN;
381 };
382 sdh1_pmx_edge_wakeup: sdh1_pmx_edge_wakeup {
383 pinctrl-single,pins = <
384 GPIO37 AF0 /* VCXO_REQ AF1 */
385 >;
386 DS_MEDIUM;PULL_DOWN;EDGE_RISE;SL_NORMAL;
387 };
388 sdh1_pmx_pd_rst_off: sdh1_pmx_pd_rst_off {
389 pinctrl-single,pins = <
390 GPIO83 AF0 /* AF0 WLAN_PDn */
391 GPIO38 AF0 /* AF0 LDO_EN */
392 >;
393 MFP_PULL_DOWN;
394 };
395 sdh1_pmx_pd_rst_on: sdh1_pmx_pd_rst_on {
396 pinctrl-single,pins = <
397 GPIO83 AF0 /* AF0 WLAN_PDn */
398 GPIO38 AF0 /* AF0 LDO_EN */
399 >;
400 MFP_PULL_UP;
401 };
402 eta6005_charger_en: eta6005_charger_en {
403 pinctrl-single,pins = <
404 GPIO08 AF0
405 >;
406 MFP_PULL_UP;
407 };
408 eta6005_charger_stat: eta6005_charger_stat {
409 pinctrl-single,pins = <
410 GPIO04 AF0
411 >;
412 MFP_DEFAULT;
413 };
414
415 otg_vbus_func: otg_vbus_func {
416 pinctrl-single,pins = <
417 VBUS_DRV AF1 /* GPIO[122] */
418 >;
419 DS_MEDIUM;PULL_DOWN;EDGE_NONE;
420 };
421
422 emac_pmx_func0: emac_pmx_func0 {
423 pinctrl-single,pins = <
424 GPIO00 AF1 /* GMAC1_RX_DV */
425 GPIO01 AF1 /* GMAC1_RX_D0 */
426 GPIO02 AF1 /* GMAC1_RX_D1 */
427 GPIO03 AF1 /* GMAC1_RX_CLK */
428 /* GPIO04 AF1 GMAC1_RX_D2 */
429 /* GPIO05 AF1 GMAC1_RX_D3 */
430 GPIO06 AF1 /* GMAC1_TX_D0 */
431 GPIO07 AF1 /* GMAC1_TX_D1 */
432 /* GPIO12 AF1 GMAC1_TX_CLK */
433 /* GPIO13 AF1 GMAC1_TX_D2 */
434 /* GPIO14 AF1 GMAC1_TX_D3 */
435 GPIO15 AF1 /* GMAC1_TX_EN */
436 GPIO16 AF1 /* GMAC1_TX_MDC */
437 /* GPIO17 AF1 GMAC1_TX_MDIO */
438 >;
439 DS_MEDIUM;PULL_DOWN;EDGE_NONE;SL_NORMAL;
440 };
441 emac_pmx_func1: emac_pmx_func1 {
442 pinctrl-single,pins = <
443 GPIO04 AF1 /* GMAC1_RX_D2 */
444 GPIO05 AF1 /* GMAC1_RX_D3 */
445 GPIO12 AF1 /* GMAC1_TX_CLK */
446 GPIO13 AF1 /* GMAC1_TX_D2 */
447 GPIO14 AF1 /* GMAC1_TX_D3 */
448 >;
449 DS_MEDIUM;PULL_DOWN;EDGE_NONE;SL_NORMAL;
450 };
451 emac_pmx_func2: emac_pmx_func2 {
452 pinctrl-single,pins = <
453 GPIO17 AF1 /* GMAC1_TX_MDIO */
454 GPIO18 AF1 /* GMAC1_TX_INT_N */
455 >;
456 DS_MEDIUM;PULL_UP;EDGE_NONE;SL_NORMAL;
457 };
458 emac_pmx_func3: emac_pmx_func3 {
459 pinctrl-single,pins = <
460 GPIO20 AF0 /* RESET */
461 /* GPIO54 AF0 LDO_EN */
462 >;
463 DS_SLOW0;PULL_FLOAT;EDGE_NONE;SL_NORMAL;
464 };
465 usim1_pmx_func: usim1_pmx_func {
466 pinctrl-single,pins = <
467 GPIO54 AF0
468 >;
469 DS_MEDIUM;PULL_UP;EDGE_NONE;SL_NORMAL;
470 };
471 usim1_pmx_func_sleep: usim1_pmx_func_sleep {
472 pinctrl-single,pins = <
473 GPIO54 AF0
474 >;
475 DS_MEDIUM;PULL_UP;EDGE_BOTH;SL_NORMAL;
476 };
477 usim2_pmx_func: usim2_pmx_func {
478 pinctrl-single,pins = <
479 GPIO53 AF0
480 >;
481 DS_MEDIUM;PULL_UP;EDGE_NONE;SL_NORMAL;
482 };
483 usim2_pmx_func_sleep: usim2_pmx_func_sleep {
484 pinctrl-single,pins = <
485 GPIO53 AF0
486 >;
487 DS_MEDIUM;PULL_UP;EDGE_BOTH;SL_NORMAL;
488 };
489 pcie_pmx_pd_rst_off: pcie_pmx_pd_rst_off {
490 pinctrl-single,pins = <
491 GPIO42 AF0 /* PERST_N */
492 GPIO48 AF0 /* DC_EN */
493 >;
494 MFP_PULL_DOWN;
495 };
496 pcie_pmx_pd_rst_on: pcie_pmx_pd_rst_on {
497 pinctrl-single,pins = <
498 GPIO42 AF0 /* PERST_N */
499 GPIO48 AF0 /* DC_EN */
500 >;
501 MFP_PULL_UP;
502 };
503 gpiokey_pmx_func: gpiokey_pmx_func {
504 pinctrl-single,pins = <
505 GPIO09 AF0
506 >;
507 DS_MEDIUM;PULL_UP;EDGE_NONE;SL_NORMAL;
508 };
509 usb_id_pinmux: usb_id_pinmux {
510 pinctrl-single,pins = <
511 USB_ID AF1 /* usbid-gpio99 */
512 >;
513 DS_MEDIUM;PULL_UP;EDGE_NONE;LPM_NONE;
514 };
515 usb_id_pinmux_slp: usb_id_pinmux_slp {
516 pinctrl-single,pins = <
517 USB_ID AF1 /* usbid-gpio99 */
518 >;
519 DS_MEDIUM;PULL_UP;EDGE_BOTH;LPM_NONE;
520 };
521 usb_host_pinmux: usb_host_pinmux {
522 pinctrl-single,pins = <
523 VBUS_DRV AF1 /* gpio-122 */
524 >;
525 DS_MEDIUM;PULL_FLOAT;EDGE_NONE;LPM_NONE;
526 };
527 };
528
529#ifdef CONFIG_BACKLIGHT_PWM
530 backlight: pwm_bl {
531 compatible = "pwm-backlight";
532 pwms = <&pwm2 50000>;
533 brightness-levels = <0 4 8 16 32 64 128 255>;
534 default-brightness-level = <6>;
535 status = "okay";
536 };
537#endif
538
539 ssp0: spi@d401b000 {
540 status = "okay";
541 pinctrl-names = "default";
542 pinctrl-0 = <&ssp0_pmx_func>;
543 asr,spi-inc-mode;
544#ifdef CONFIG_FB_SPI_LCD
545 /* this enhancemnet feature is not suitable for
546 3 line 9bits spi lcd. */
547 /* asr,ssp-enhancement; */
548
549 lcd: spidev@0 {
550 #address-cells = <1>;
551 #size-cells = <1>;
552 compatible = "spilcd";
553 pinctrl-names = "default";
554 pinctrl-0 = <&lcd_bl_func>;
555 reg = <0>;
556 /* ST7735: need to set spi-max-frequency to 26M
557 * ST7789V: can set spi-max-frequency to 52M
558 */
559 spi-max-frequency = <26000000>;
560 xres = <128>;
561 yres = <128>;
562 bits = <8>; /* 8: 4line, 9: 3line */
563 rst_gpio = <&gpio 24 0>;
564#ifndef CONFIG_BACKLIGHT_PWM
565 bl_gpio = <&gpio 127 0>;
566#endif
567 rs_gpio = <&gpio 22 0>;
568 /* if comment the following statement, it means
569 * the avdd is sit on the "always-on" ldo.
570 */
571 /* avdd-supply = <&LDO1>; */
572 };
573#endif
574 };
575 twsi0: i2c@d4011000 {
576 status= "okay";
577
578 };
579 twsi2: i2c@d4037000 {
580 status = "okay";
581
582 pmic5: pm802@0 {
583 compatible = "asr,pm802";
584 reg = <0x00>;
585 interrupts = <4>;
586 interrupt-parent = <&intc>;
587 interrupt-controller;
588 #interrupt-cells = <1>;
589 chg_irq_from_exton;
590 /* set scs-int-active-high depending on board connection */
591 scs-int-active-high;
592 battery {
593 compatible = "asr,pm802-bat";
594 status = "disabled";
595
596 online-gpadc = <1>;
597 temperature-gpadc = <1>;
598
599 hi-volt-online = <1150>; /* mV */
600 lo-volt-online = <20>; /* mV */
601 hi-volt-temp = <1150>; /* mV */
602 lo-volt-temp = <200>; /* mV */
603
604 sw-fg-use-ntc;
605 full-capacity = <2050>; /* mAh */
606 r1-resistor = <40>; /* mohm */
607 r2-resistor = <30>; /* mohm */
608 rs-resistor = <120>; /* mohm */
609 roff-resistor = <0>; /* mohm */
610 roff-initial-resistor = <0>; /* mohm */
611
612 times-in-zero-degree = <1>;
613 offset-in-zero-degree = <0>;
614
615 times-in-ten-degree = <2>;
616 offset-in-ten-degree = <100>;
617
618 power-off-threshold = <3350>; /* mV */
619 safe-power-off-threshold = <3200>; /* mV */
620
621 online-gp-bias-curr = <11>; /* uA */
622
623 soc-ramp-up-interval = <150>; /* s */
624 /* choose -20C, 0C, 10C, 40C, 45C, 55C as threshold */
625 tbat-threshold = <20 0 10 40 45 55>; /* ohm */
626 ntc-table-size = <88>;
627 stop-chg-for-vbatmeas;
628 /* -24C, -23C, ..., 62C, 63C */
629 ntc-table = <
630 89680 85130 80840 76790 72970 69360 65960 62740
631 59700 56830 54130 51530 49100 46800 44610 42550
632 40590 38730 36970 35300 33710 32210 30780 29420
633 28130 26910 25750 24640 23590 22580 21630 20720
634 19860 19030 18250 17500 16790 16110 15460 14840
635 14250 13690 13150 12640 12150 11680 11230 10800
636 10390 10000 9620 9270 8920 8590 8280 7980
637 7690 7410 7150 6890 6650 6410 6190 5970
638 5770 5570 5380 5190 5020 4850 4680 4530
639 4380 4230 4100 3960 3830 3710 3590 3480
640 3370 3260 3160 3060 2960 2870 2780 2700
641 >;
642 };
643 usb {
644 status = "disabled";
645 vbus_gpio = <0xff>; /* set_vbus */
646 id-gpadc = <0xff>; /* usb-id */
647 vchg-from-exton = <1>;
648 vbus-detect = <1>; /* vbus-irq */
649 get-vbus = <1>; /* get-vbus */
650 };
651 };
652 pmic6: pm803@30 {
653 compatible = "asr,pm803";
654 reg = <0x30>;
655 interrupts = <4>;
656 interrupt-parent = <&intc>;
657 interrupt-controller;
658 #interrupt-cells = <1>;
659 chg_irq_from_exton;
660 /* set scs-int-active-high depending on board connection */
661 scs-int-active-high;
662 battery {
663 compatible = "asr,pm803-bat";
664 status = "disabled";
665
666 online-gpadc = <1>;
667 temperature-gpadc = <1>;
668
669 hi-volt-online = <1150>; /* mV */
670 lo-volt-online = <20>; /* mV */
671 hi-volt-temp = <1150>; /* mV */
672 lo-volt-temp = <200>; /* mV */
673
674 sw-fg-use-ntc;
675 full-capacity = <2050>; /* mAh */
676 r1-resistor = <40>; /* mohm */
677 r2-resistor = <30>; /* mohm */
678 rs-resistor = <120>; /* mohm */
679 roff-resistor = <0>; /* mohm */
680 roff-initial-resistor = <0>; /* mohm */
681
682 times-in-zero-degree = <1>;
683 offset-in-zero-degree = <0>;
684
685 times-in-ten-degree = <2>;
686 offset-in-ten-degree = <100>;
687
688 power-off-threshold = <3350>; /* mV */
689 safe-power-off-threshold = <3200>; /* mV */
690
691 online-gp-bias-curr = <11>; /* uA */
692
693 soc-ramp-up-interval = <150>; /* s */
694 /* choose -20C, 0C, 10C, 40C, 45C, 55C as threshold */
695 tbat-threshold = <20 0 10 40 45 55>; /* ohm */
696 ntc-table-size = <88>;
697 stop-chg-for-vbatmeas;
698 /* -24C, -23C, ..., 62C, 63C */
699 ntc-table = <
700 89680 85130 80840 76790 72970 69360 65960 62740
701 59700 56830 54130 51530 49100 46800 44610 42550
702 40590 38730 36970 35300 33710 32210 30780 29420
703 28130 26910 25750 24640 23590 22580 21630 20720
704 19860 19030 18250 17500 16790 16110 15460 14840
705 14250 13690 13150 12640 12150 11680 11230 10800
706 10390 10000 9620 9270 8920 8590 8280 7980
707 7690 7410 7150 6890 6650 6410 6190 5970
708 5770 5570 5380 5190 5020 4850 4680 4530
709 4380 4230 4100 3960 3830 3710 3590 3480
710 3370 3260 3160 3060 2960 2870 2780 2700
711 >;
712 };
713 usb {
714 status = "disabled";
715 vbus_gpio = <0xff>; /* set_vbus */
716 id-gpadc = <0xff>; /* usb-id */
717 vchg-from-exton = <1>;
718 vbus-detect = <1>; /* vbus-irq */
719 get-vbus = <1>; /* get-vbus */
720 };
721 };
722 };
723 };
724 };
725
726 vcc_sdh1: sd-regulator {
727 compatible = "regulator-fixed";
728 pinctrl-names = "default";
729 pinctrl-0 = <&sd_ldo_en>;
730 regulator-name = "SDH1 VCC";
731 regulator-min-microvolt = <3300000>;
732 regulator-max-microvolt = <3300000>;
733 gpio = <&gpio 19 0>;
734 enable-active-high;
735 };
736
737 asr-rfkill {
738 compatible = "asr,asr-rfkill";
739 pinctrl-names = "off", "on";
740 pinctrl-0 = <&sdh1_pmx_pd_rst_off>;
741 pinctrl-1 = <&sdh1_pmx_pd_rst_on>;
742 sd-host = <&sdh1>;
743 pd-gpio = <&gpio 83 0>;
744/* 3v3-ldo-gpio = <&gpio 38 0>; */
745 edge-wakeup-gpio = <&gpio 37 0>;
746 host-wakeup-wlan-gpio = <&gpio 38 0>;
747 wlan-wakeup-host-gpio = <&gpio 37 0>;
748 status = "okay";
749 };
750
751 usim1: usim1 {
752 compatible = "asr,usim1";
753 pinctrl-names = "default", "sleep";
754 pinctrl-0 = <&usim1_pmx_func>;
755 pinctrl-1 = <&usim1_pmx_func_sleep>;
756 edge_detect_gpio = <54>; /* GPIO54: SIM detect pin */
757 status = "okay";
758 };
759 /* set okay for this node if usim2 is needed */
760 usim2: usim2 {
761 compatible = "asr,usim2";
762 pinctrl-names = "default", "sleep";
763 pinctrl-0 = <&usim2_pmx_func>;
764 pinctrl-1 = <&usim2_pmx_func_sleep>;
765 edge_detect_gpio = <53>; /* GPIO53: SIM detect pin */
766#ifdef CONFIG_ASR_DSDS
767 status = "okay";
768#else
769 status = "disabled";
770#endif
771 };
772 gpio_keys {
773 compatible = "gpio-keys";
774 #address-cells = <1>;
775 #size-cells = <0>;
776 /* autorepeat; */
777 pinctrl-names = "default";
778 pinctrl-0 = <&gpiokey_pmx_func>;
779 button@1 {
780 label = "qrcode-key";
781 linux,code = <139>; /* KEY_MENU, refer to linux/input.h */
782 /* NOTE:
783 * We use the FORCE DOWNLOAD key to implement the qrcode key in DKB.
784 * Customer SHOULD change it to any other gpios.
785 * Because user may do the misoperation that
786 * powerup with FDL key pressed,
787 * then the borad will enter force download mode.
788 */
789 gpios = <&gpio 9 1>;
790 gpio-key,wakeup;
791 };
792 };
793
794 /* deprecated, move to mfpr@d401e000
795 lpm-board-cfg {
796 compatible = "asr,lpm-board-cfg";
797 wakeup-state-d1pp = <0x1>;
798 udr-mfpr-config = <0x1B0 0xA040 0x0
799 0x1B4 0xA040 0x0>;
800 };
801 */
802};
803#ifdef CONFIG_ASR_DSDS
804#include "asr_pm802_2usim.dtsi"
805#include "asr_pm803_2usim.dtsi"
806#else
807#include "asr_pm802.dtsi"
808#include "asr_pm803.dtsi"
809#endif
810#include "asr1903_spinor_layout.dtsi"